From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A03BD7C for ; Tue, 4 Apr 2023 10:50:40 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id ED4CDC4339B; Tue, 4 Apr 2023 10:50:37 +0000 (UTC) Date: Tue, 4 Apr 2023 11:50:34 +0100 From: Catalin Marinas To: Kristina Martsenko Cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, Will Deacon , Marc Zyngier , Oliver Upton , James Morse , Suzuki K Poulose , Zenghui Yu , Mark Rutland , Mark Brown , Luis Machado , Vladimir Murzin , linux-kernel@vger.kernel.org Subject: Re: [PATCH 04/10] arm64: mops: document boot requirements for MOPS Message-ID: References: <20230216160012.272345-1-kristina.martsenko@arm.com> <20230216160012.272345-5-kristina.martsenko@arm.com> <61b0e30a-568c-d7f6-7b67-e9fc8b68de25@arm.com> Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <61b0e30a-568c-d7f6-7b67-e9fc8b68de25@arm.com> On Fri, Mar 24, 2023 at 01:00:43AM +0000, Kristina Martsenko wrote: > On 17/03/2023 15:07, Catalin Marinas wrote: > > On Thu, Feb 16, 2023 at 04:00:06PM +0000, Kristina Martsenko wrote: > >> + For CPUs with Memory Copy and Memory Set instructions (FEAT_MOPS): > >> + > >> + - If the kernel is entered at EL1 and EL2 is present: > >> + > >> + - HCRX_EL2.MSCEn (bit 11) must be initialised to 0b1. > >> + > >> + - HCRX_EL2.MCE2 (bit 10) must be initialised to 0b0. > > > > Regarding MCE2, does EL1 actually care if EL2 wants to handle all the > > memcpy/memset exceptions? > > No, EL1 does not need to handle the exceptions itself, but I don't see any > current use case for allowing EL2 to handle it. > > If it was allowed, I think booting.txt would need to specify exactly what Linux > expects EL2 to do if MCE2 is set (eg, that EL2 handles the exception by > reformatting registers, modifying single step state, etc). What I meant is that an EL1 kernel shouldn't care if MCE2 is 0 or 1. We could clarify that if set to 1, it is expected that the hypervisor handles the memory copy/set exceptions accordingly. > > There may even be a valid case to do this at > > EL2 if you run a guest that uses these instructions but has no clue on > > how to deal with the specific exception like WrongOption. > > Not sure I follow - this series adds the exception handling, so how can a Linux > guest not know how to handle the exception? The guest may not always be Linux (e.g. some microkernel) and may not expect the hardware implementation to change underneath. > Or do you mean that there may be times when EL1 can't take the exception but > EL2 may move it to another CPU, and so EL2 would need to handle the exception? I haven't thought of this but it's actually a good point. Are there any cases where Linux can't handle a memcpy exception? I guess we need to be careful with taking such exception in an atomic context (e.g. no rescheduling on the return path). > I'm not sure if Linux ever uses mops instructions at times like that. The compiler may generate a memcpy() call by simply assigning a structure to another. So we can't control where those instructions are used. > Note that this series does not add support for mops in guests yet. You mean there's no KVM support. But Linux may be run under a different hypervisor (e.g. Hyper-V) as a guest. > I think booting.txt can be updated when that support is added. In booting.txt, when you say the kernel entered at EL1, it implies that it may be run as a guest under a random hypervisor. So maybe we should detail the MCE2 requirement a bit, saying that it can be either 0 or 1 but, for the latter, the hypervisor must handle the corresponding exceptions. -- Catalin From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EA98CC6FD1D for ; Tue, 4 Apr 2023 10:51:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=4gLYiUI+1/DL0Swko9T/VdkWfLR2XjULIj7oCRV8N/M=; b=m+yVt9h0anujaF r/gSwrMEuFDX9gaEczvR18qQVPXFmUcjZVOcsj8xp2nyrRSwMTLUSVhf0n6fkiTxu3d++8bcbE8KX veAQb/ZIi7tnX8H/7YpyA/dLuKOuUCilcnUkuQ8ZHqAgSmIRSCGpvUuAjfrL8yTdYZYdnxEJCP+Ch LLBROvl1RwSz6ApvIunrvH5ZiWwMtbv/Qd60RfrLCppAtAZClVDVJTmU0EmOV052N2foUflxxhBdd i7bP72ZAmMzQ8vdt3VRUEvvO+LpISC7ohL2KD60uBJUSKZxcmddhNuMJB/V/QId9w/yVvj59XfgxR vHYFW3pXKOUO8TqZ9skA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pjeFU-000y7F-2b; Tue, 04 Apr 2023 10:50:48 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1pjeFP-000y4n-2W for linux-arm-kernel@lists.infradead.org; Tue, 04 Apr 2023 10:50:46 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id D55DB62486; Tue, 4 Apr 2023 10:50:40 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id ED4CDC4339B; Tue, 4 Apr 2023 10:50:37 +0000 (UTC) Date: Tue, 4 Apr 2023 11:50:34 +0100 From: Catalin Marinas To: Kristina Martsenko Cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, Will Deacon , Marc Zyngier , Oliver Upton , James Morse , Suzuki K Poulose , Zenghui Yu , Mark Rutland , Mark Brown , Luis Machado , Vladimir Murzin , linux-kernel@vger.kernel.org Subject: Re: [PATCH 04/10] arm64: mops: document boot requirements for MOPS Message-ID: References: <20230216160012.272345-1-kristina.martsenko@arm.com> <20230216160012.272345-5-kristina.martsenko@arm.com> <61b0e30a-568c-d7f6-7b67-e9fc8b68de25@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <61b0e30a-568c-d7f6-7b67-e9fc8b68de25@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230404_035043_902243_DA437796 X-CRM114-Status: GOOD ( 34.30 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Mar 24, 2023 at 01:00:43AM +0000, Kristina Martsenko wrote: > On 17/03/2023 15:07, Catalin Marinas wrote: > > On Thu, Feb 16, 2023 at 04:00:06PM +0000, Kristina Martsenko wrote: > >> + For CPUs with Memory Copy and Memory Set instructions (FEAT_MOPS): > >> + > >> + - If the kernel is entered at EL1 and EL2 is present: > >> + > >> + - HCRX_EL2.MSCEn (bit 11) must be initialised to 0b1. > >> + > >> + - HCRX_EL2.MCE2 (bit 10) must be initialised to 0b0. > > > > Regarding MCE2, does EL1 actually care if EL2 wants to handle all the > > memcpy/memset exceptions? > > No, EL1 does not need to handle the exceptions itself, but I don't see any > current use case for allowing EL2 to handle it. > > If it was allowed, I think booting.txt would need to specify exactly what Linux > expects EL2 to do if MCE2 is set (eg, that EL2 handles the exception by > reformatting registers, modifying single step state, etc). What I meant is that an EL1 kernel shouldn't care if MCE2 is 0 or 1. We could clarify that if set to 1, it is expected that the hypervisor handles the memory copy/set exceptions accordingly. > > There may even be a valid case to do this at > > EL2 if you run a guest that uses these instructions but has no clue on > > how to deal with the specific exception like WrongOption. > > Not sure I follow - this series adds the exception handling, so how can a Linux > guest not know how to handle the exception? The guest may not always be Linux (e.g. some microkernel) and may not expect the hardware implementation to change underneath. > Or do you mean that there may be times when EL1 can't take the exception but > EL2 may move it to another CPU, and so EL2 would need to handle the exception? I haven't thought of this but it's actually a good point. Are there any cases where Linux can't handle a memcpy exception? I guess we need to be careful with taking such exception in an atomic context (e.g. no rescheduling on the return path). > I'm not sure if Linux ever uses mops instructions at times like that. The compiler may generate a memcpy() call by simply assigning a structure to another. So we can't control where those instructions are used. > Note that this series does not add support for mops in guests yet. You mean there's no KVM support. But Linux may be run under a different hypervisor (e.g. Hyper-V) as a guest. > I think booting.txt can be updated when that support is added. In booting.txt, when you say the kernel entered at EL1, it implies that it may be run as a guest under a random hypervisor. So maybe we should detail the MCE2 requirement a bit, saying that it can be either 0 or 1 but, for the latter, the hypervisor must handle the corresponding exceptions. -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel