From: William Breathitt Gray <william.gray@linaro.org>
To: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org,
Johannes Berg <johannes.berg@intel.com>,
Jonathan Cameron <jic23@kernel.org>,
Andrew Morton <akpm@linux-foundation.org>,
Al Viro <viro@zeniv.linux.org.uk>,
Nathan Chancellor <nathan@kernel.org>,
Nick Desaulniers <ndesaulniers@google.com>
Subject: Re: [PATCH v3 3/3] counter: 104-quad-8: Utilize helper functions to handle PR, FLAG and PSC
Date: Tue, 11 Apr 2023 10:05:25 -0400 [thread overview]
Message-ID: <ZDVpJb9DyIU+5eJf@fedora> (raw)
In-Reply-To: <ZDVli05x7u/bg7Zc@smile.fi.intel.com>
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On Tue, Apr 11, 2023 at 04:50:03PM +0300, Andy Shevchenko wrote:
> On Mon, Apr 10, 2023 at 10:03:13AM -0400, William Breathitt Gray wrote:
> > The Preset Register (PR), Flag Register (FLAG), and Filter Clock
> > Prescaler (PSC) have common usage patterns. Wrap up such usage into
> > dedicated functions to improve code clarity.
>
> ...
>
> > *val = 0;
>
> Is not needed now as always being initialized by below call.
The regmap_noinc_read() call only reads the number of bytes requested.
Since we request 3 bytes, the upper bytes of the u64 val remain
uninitialized, so that is why we need to set *val = 0. This isn't
immediately clear in the code, so I can add a comment to make it
explicit.
>
> > spin_lock_irqsave(&priv->lock, irqflags);
> >
> > iowrite8(SELECT_RLD | RESET_BP | TRANSFER_CNTR_TO_OL, &chan->control);
> > -
> > - for (i = 0; i < 3; i++)
> > - *val |= (unsigned long)ioread8(&chan->data) << (8 * i);
> > + ioread8_rep(&chan->data, val, 3);
> >
> > spin_unlock_irqrestore(&priv->lock, irqflags);
>
> ...
>
> > + struct channel_reg __iomem *const chan = priv->reg->channel + id;
>
> Not sure if array representation will look better here and elsewhere.
>
> struct channel_reg __iomem *const chan = &priv->reg->channel[id];
Perhaps so, but all these struct channel_reg lines will go away in the
next patch [0] migrating to the regmap API, so for the sake of stability
of this patch I hesitate to change these lines.
William Breathitt Gray
[0] https://lore.kernel.org/all/20230410141252.143998-1-william.gray@linaro.org/
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next prev parent reply other threads:[~2023-04-11 14:05 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-10 14:03 [PATCH v3 0/3] Refactor 104-quad-8 to match device operations William Breathitt Gray
2023-04-10 14:03 ` [PATCH v3 1/3] counter: 104-quad-8: Utilize bitfield access macros William Breathitt Gray
2023-04-10 14:03 ` [PATCH v3 2/3] counter: 104-quad-8: Refactor to buffer states for CMR, IOR, and IDR William Breathitt Gray
2023-04-10 14:03 ` [PATCH v3 3/3] counter: 104-quad-8: Utilize helper functions to handle PR, FLAG and PSC William Breathitt Gray
2023-04-11 13:50 ` Andy Shevchenko
2023-04-11 14:05 ` William Breathitt Gray [this message]
2023-04-11 14:43 ` Andy Shevchenko
2023-04-11 14:58 ` William Breathitt Gray
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