Re: Cache Invalidation Solution for Nested IOMMU

[Nicolin Chen <nicolinc@nvidia.com>]

On Tue, Apr 11, 2023 at 03:41:07PM -0300, Jason Gunthorpe wrote:

> > > > > > > We are using ioctl method now.
> > > > > > > From the testing, the TLB miss impacts performance a lot, so we use
> > > > > > > huge page method.
> > > > > > > After using huge page method, guest can achieve comparable performance
> > > > > > > with host.
> > > > > > 
> > > > > > Looks like these tests are not stressing the MM, just measuring pure
> > > > > > BW of the DMA, so they don't get into the invalidation regime..
> > > > > > 
> > > > > > You need to measure a more real application that is actually using the
> > > > > > MM (eg alloc/free memory, fork, etc) while it operates and turn on SVA.

> > > I'm not talking about kernel dma_map/unmap, I'm talking about MM
> > > activities like mmap and munmap that become slower once SVA is enabled
> > 
> > Is it about mmap/munmap() calls or accessing mmap'd memory?
> 
> I mean literally userspace mmap() calls to change the mm_struct.

Hmm, it sounds like a different perf factor? Otherwise, I still
don't understand how it impacts our decision of choosing between
mmap'd queue page and doing copy_from_user().

Thanks
Nicolin