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Fri, 14 Apr 2023 11:06:22 +0300 Date: Fri, 14 Apr 2023 11:06:22 +0300 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= To: Suraj Kandpal Message-ID: References: <20230414072345.1041605-1-suraj.kandpal@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20230414072345.1041605-1-suraj.kandpal@intel.com> X-Patchwork-Hint: comment Subject: Re: [Intel-gfx] [PATCH] drm/i915/display: PCH display HPD IRQ is not detected with default filter value X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Fri, Apr 14, 2023 at 12:53:45PM +0530, Suraj Kandpal wrote: > On TGP, the RTC (always running) was reduced from 3MHz to 32KHz. > As a result of this change, when HPD active going low pulse or HPD IRQ > is presented and the refclk (19.2MHz) is not toggling already toggling, > there is a 60 to 90us synchronization delay which effectively reduces > the duration of the IRQ pulse to less than the programmed 500us filter > value and the hot plug interrupt is NOT registered. > Program 0xC7204 (PP_CONTROL) bit #0 to '1' to enable workaround and clear > to disable it. > Driver shall enable this WA when external display is connected and > remove WA when display is unplugged or before going into sleep to allow > CS entry. > Driver shall not enable WA when eDP is connected. > Wa_1508796671:adls > > Cc: Arun Murthy > Cc: Uma Shankar > Signed-off-by: Suraj Kandpal > --- > drivers/gpu/drm/i915/display/intel_dp.c | 19 +++++++++++++++++++ > drivers/gpu/drm/i915/display/intel_pps.c | 1 + > drivers/gpu/drm/i915/i915_drv.h | 2 ++ > 3 files changed, 22 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c > index 8e16745275f6..f93895d99fd1 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -4689,6 +4689,7 @@ intel_dp_detect(struct drm_connector *connector, > struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); > struct intel_encoder *encoder = &dig_port->base; > enum drm_connector_status status; > + int32_t pp; > > drm_dbg_kms(&dev_priv->drm, "[CONNECTOR:%d:%s]\n", > connector->base.id, connector->name); > @@ -4792,6 +4793,22 @@ intel_dp_detect(struct drm_connector *connector, > status, > intel_dp->dpcd, > intel_dp->downstream_ports); > + > + /* > + * WA_150879661:adls > + * Driver shall enable this WA when external display is connected > + * and remove WA when display is unplugged > + */ > + if (IS_ALDERLAKE_S(dev_priv)) { > + if (status == connector_status_connected && > + !dev_priv->edp_present) > + pp = PANEL_POWER_ON; > + else if (status == connector_status_disconnected) > + pp = 0; > + > + intel_de_rmw(dev_priv, _MMIO(PCH_PPS_BASE + 4), 1, pp); > + } This whole w/a is just utter nonsense. The better fix would be to adjust the SHPD_FILTER length. There was some internal discussion around this the last time it was raised, but the only clear conclusion was to reduce the default SHPD_FILTER from 500 to 250 usec (which is what the DP spec actually cals for) on future hw. We already adjust that SHPD_FILTER down a little bit on some PCHs (due to some other w/a presumably), but I think just dropping it further to ~400 usec (if we don't want to go all the way down to 250 on old hw as well) should cover this issue. > + > return status; > } > > @@ -5489,6 +5506,8 @@ intel_dp_init_connector(struct intel_digital_port *dig_port, > if (!intel_edp_init_connector(intel_dp, intel_connector)) { > intel_dp_aux_fini(intel_dp); > goto fail; > + } else { > + dev_priv->edp_present = true; > } > > intel_dp_set_source_rates(intel_dp); > diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c > index 24b5b12f7732..21538338af3d 100644 > --- a/drivers/gpu/drm/i915/display/intel_pps.c > +++ b/drivers/gpu/drm/i915/display/intel_pps.c > @@ -1726,4 +1726,5 @@ void assert_pps_unlocked(struct drm_i915_private *dev_priv, enum pipe pipe) > I915_STATE_WARN(panel_pipe == pipe && locked, > "panel assertion failure, pipe %c regs locked\n", > pipe_name(pipe)); > + > } > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 6254aa977398..ebe16aee0ca8 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -352,6 +352,8 @@ struct drm_i915_private { > /* The TTM device structure. */ > struct ttm_device bdev; > > + bool edp_present; > + > I915_SELFTEST_DECLARE(struct i915_selftest_stash selftest;) > > /* > -- > 2.25.1 -- Ville Syrjälä Intel