From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 88046C7EE23 for ; Fri, 26 May 2023 10:27:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:In-Reply-To: Content-Transfer-Encoding:Content-Type:MIME-Version:References:Message-ID: Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=ZB0YrkSDDsF6FaE23DBSfwIj+KoUBcbcE4F9Incq/pA=; b=Zpo0uh9t0Ps6zkwGCoi8t1yUsu w0l4LRvwtBpoz43O3qsnKZW28yr6PoaFqcOaGKibMll02BheVs61u/UXTMGDp4ivIDG6TloYcPf1r mYxpB6OXPP1BbTG4GM2rdQfAK4l7ufvCmiwvWE/HwFwACPRslYiDteA/2yeSZqLNlHalUawrQ9NNC rdv2+n3Bv2pgKxeQY7giOjrt1vlVBzE1xqp3CdPFoz9+R6OlMUp72zquHADvODU1RxLJGvtQ6one8 LTHCG5gF0o6c7UgnGuIyrONjfYxVGQ+oH++gfTwRM4U9XQ7/zdAJgo3rh6PWvKiyLbsrrrD88VBRw y1frM4HQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1q2Ufd-0021T0-0q; Fri, 26 May 2023 10:27:41 +0000 Received: from pidgin.makrotopia.org ([185.142.180.65]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1q2UfY-0021PL-2t; Fri, 26 May 2023 10:27:39 +0000 Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.96) (envelope-from ) id 1q2UfM-00062F-0J; Fri, 26 May 2023 10:27:24 +0000 Date: Fri, 26 May 2023 11:27:15 +0100 From: Daniel Golle To: Jia-wei Chang =?utf-8?B?KOW8teS9s+WBiSk=?= Cc: "linux-kernel@vger.kernel.org" , "linux-mediatek@lists.infradead.org" , "vincent@systemli.org" , "hsinyi@google.com" , "viresh.kumar@linaro.org" , Project_Global_Chrome_Upstream_Group , "linux-arm-kernel@lists.infradead.org" , "khilman@baylibre.com" , "matthias.bgg@gmail.com" , "rafael@kernel.org" , Rex-BC Chen =?utf-8?B?KOmZs+afj+i+sCk=?= , "angelogioacchino.delregno@collabora.com" , Chen Zhong =?utf-8?B?KOmSn+i+sCk=?= , "error27@gmail.com" Subject: Re: [PATCH v2 4/4] cpufreq: mediatek: Raise proc and sram max voltage for MT7622/7623 Message-ID: References: <20230324101130.14053-1-jia-wei.chang@mediatek.com> <20230324101130.14053-5-jia-wei.chang@mediatek.com> <3054e2d9-7f77-a22a-293d-382f19494079@collabora.com> <4e5a8202f7446481def19e5926d1bfd6e6568dd7.camel@mediatek.com> <5dc13e13143aaffc4477fb9dcf565070cf1a9822.camel@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <5dc13e13143aaffc4477fb9dcf565070cf1a9822.camel@mediatek.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230526_032737_098295_130275F6 X-CRM114-Status: GOOD ( 66.34 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org On Fri, May 26, 2023 at 08:27:25AM +0000, Jia-wei Chang (張佳偉) wrote: > On Wed, 2023-05-24 at 13:42 +0100, Daniel Golle wrote: > > On Wed, May 24, 2023 at 08:43:31AM +0000, Jia-wei Chang (張佳偉) wrote: > > > On Wed, 2023-05-24 at 09:28 +0200, AngeloGioacchino Del Regno wrote: > > > > Il 23/05/23 19:37, Daniel Golle ha scritto: > > > > > On Tue, May 23, 2023 at 04:56:47PM +0200, AngeloGioacchino Del > > > > > Regno wrote: > > > > > > Il 22/05/23 20:03, Daniel Golle ha scritto: > > > > > > > Hi Jia-Wei, > > > > > > > Hi AngeloGioacchino, > > > > > > > > > > > > > > On Fri, Mar 24, 2023 at 06:11:30PM +0800, jia-wei.chang > > > > > > > wrote: > > > > > > > > From: AngeloGioacchino Del Regno < > > > > > > > > angelogioacchino.delregno@collabora.com> > > > > > > > > > > > > > > > > During the addition of SRAM voltage tracking for CCI > > > > > > > > scaling, > > > > > > > > this > > > > > > > > driver got some voltage limits set for the vtrack > > > > > > > > algorithm: > > > > > > > > these > > > > > > > > were moved to platform data first, then enforced in a > > > > > > > > later > > > > > > > > commit > > > > > > > > 6a17b3876bc8 ("cpufreq: mediatek: Refine > > > > > > > > mtk_cpufreq_voltage_tracking()") > > > > > > > > using these as max values for the regulator_set_voltage() > > > > > > > > calls. > > > > > > > > > > > > > > > > In this case, the vsram/vproc constraints for MT7622 and > > > > > > > > MT7623 > > > > > > > > were supposed to be the same as MT2701 (and a number of > > > > > > > > other > > > > > > > > SoCs), > > > > > > > > but that turned out to be a mistake because the > > > > > > > > aforementioned two > > > > > > > > SoCs' maximum voltage for both VPROC and VPROC_SRAM is > > > > > > > > 1.36V. > > > > > > > > > > > > > > > > Fix that by adding new platform data for MT7622/7623 > > > > > > > > declaring the > > > > > > > > right {proc,sram}_max_volt parameter. > > > > > > > > > > > > > > > > Fixes: ead858bd128d ("cpufreq: mediatek: Move voltage > > > > > > > > limits > > > > > > > > to platform data") > > > > > > > > Fixes: 6a17b3876bc8 ("cpufreq: mediatek: Refine > > > > > > > > mtk_cpufreq_voltage_tracking()") > > > > > > > > Signed-off-by: AngeloGioacchino Del Regno < > > > > > > > > angelogioacchino.delregno@collabora.com> > > > > > > > > Signed-off-by: Jia-Wei Chang > > > > > > > > --- > > > > > > > > drivers/cpufreq/mediatek-cpufreq.c | 13 +++++++++++-- > > > > > > > > 1 file changed, 11 insertions(+), 2 deletions(-) > > > > > > > > > > > > > > > > diff --git a/drivers/cpufreq/mediatek-cpufreq.c > > > > > > > > b/drivers/cpufreq/mediatek-cpufreq.c > > > > > > > > index 764e4fbdd536..9a39a7ccfae9 100644 > > > > > > > > --- a/drivers/cpufreq/mediatek-cpufreq.c > > > > > > > > +++ b/drivers/cpufreq/mediatek-cpufreq.c > > > > > > > > @@ -693,6 +693,15 @@ static const struct > > > > > > > > mtk_cpufreq_platform_data mt2701_platform_data = { > > > > > > > > .ccifreq_supported = false, > > > > > > > > }; > > > > > > > > +static const struct mtk_cpufreq_platform_data > > > > > > > > mt7622_platform_data = { > > > > > > > > + .min_volt_shift = 100000, > > > > > > > > + .max_volt_shift = 200000, > > > > > > > > + .proc_max_volt = 1360000, > > > > > > > > + .sram_min_volt = 0, > > > > > > > > + .sram_max_volt = 1360000, > > > > > > > > > > > > > > This change breaks cpufreq (with ondemand scheduler) on my > > > > > > > BPi > > > > > > > R64 > > > > > > > board (having MT7622AV SoC with MT6380N PMIC). > > > > > > > ... > > > > > > > [ 2.540091] cpufreq: __target_index: Failed to change > > > > > > > cpu > > > > > > > frequency: -22 > > > > > > > [ 2.556985] cpu cpu0: cpu0: failed to scale up voltage! > > > > > > > ... > > > > > > > (repeating a lot, every time the highest operating point is > > > > > > > selected > > > > > > > by the cpufreq governor) > > > > > > > > > > > > > > The reason is that the MT6380N doesn't support 1360000uV on > > > > > > > the > > > > > > > supply > > > > > > > outputs used for SRAM and processor. > > > > > > > > > > > > > > As for some reason cpufreq-mediatek tries to rise the SRAM > > > > > > > supply > > > > > > > voltage to the maximum for a short moment (probably a side- > > > > > > > effect of > > > > > > > the voltage tracking algorithm), this fails because the > > > > > > > PMIC > > > > > > > only > > > > > > > supports up to 1350000uV. As the highest operating point is > > > > > > > anyway > > > > > > > using only 1310000uV the simple fix is setting 1350000uV as > > > > > > > the > > > > > > > maximum > > > > > > > instead for both proc_max_volt and sram_max_volt. > > > > > > > > > > > > > > A similar situation applies also for BPi R2 (MT7623NI with > > > > > > > MT6323L > > > > > > > PMIC), here the maximum supported voltage of the PMIC which > > > > > > > also only > > > > > > > supports up to 1350000uV, and the SoC having its highest > > > > > > > operating > > > > > > > voltage defined at 1300000uV. > > > > > > > > > > > > > > If all agree with the simple fix I will post a patch for > > > > > > > that. > > > > > > > > > > > > > > However, to me it feels fishy to begin with that the > > > > > > > tracking > > > > > > > algorithm > > > > > > > tries to rise the voltage above the highest operating point > > > > > > > defined in > > > > > > > device tree, see here: > > > > > > > > > > > > > > 6a17b3876bc830 drivers/cpufreq/mediatek-cpufreq.c (Jia-Wei > > > > > > > Chang 2022-05-05 19:52:20 +0800 > > > > > > > 100) new_vsram > > > > > > > = clamp(new_vproc + soc_data->min_volt_shift, > > > > > > > 6a17b3876bc830 drivers/cpufreq/mediatek-cpufreq.c (Jia-Wei > > > > > > > Chang 2022-05-05 19:52:20 +0800 > > > > > > > 101) soc_data->sram_min_volt, > > > > > > > soc_data- > > > > > > > > sram_max_volt); > > > > > > > > > > > > > > However, I did not investigate in depth the purpose of this > > > > > > > initial rise and can impossibly test my modifications to > > > > > > > the > > > > > > > tracking algorithm on all supported SoCs. > > > > > > > > > > > > > > > > > > > Thanks for actually reporting that, I don't think that > > > > > > there's > > > > > > any > > > > > > valid reason why the algorithm should set a voltage higher > > > > > > than > > > > > > the > > > > > > maximum votage specified in the fastest OPP. > > > > > > > > > > > > Anyway - the logic for the platform data of this driver is to > > > > > > declare > > > > > > the maximum voltage that SoC model X supports, regardless of > > > > > > the > > > > > > actual > > > > > > board-specific OPPs, so that part is right; to solve this > > > > > > issue, > > > > > > I guess > > > > > > that the only way is for this driver to parse the OPPs during > > > > > > .probe() > > > > > > and then always use in the algorithm > > > > > > > > > > > > vproc_max = max(proc_max_volt, opp_vproc_max); > > > > > > vsram_max = max(sram_max_volt, vsram_vreg_max); > > > > > > Hi Daniel, Angelo Sir, > > > > > > Thanks for the issue report and suggestions. > > > > > > Is it possible to modify the value of proc_max_volt and > > > sram_max_volt > > > to 1310000 in mt7622_platform_data as the highest voltage declared > > > in > > > mt7622.dtsi and then give it a try? > > > > > > Sorry, I need someone help to check this on mt7622 since I don't > > > have > > > mt7622 platform.. > > > > Unfortunately also setting proc_max_volt and sram_max_volt to 1310000 > > doesn't work: > > [ 1.983325] cpu cpu0: cpu0: failed to scale up voltage! > > [ 1.988621] cpufreq: __target_index: Failed to change cpu > > frequency: -22 > > ::repeating infinitely:: > > > > This is because in mt6380-regulator.c you can see > > static const unsigned int ldo_volt_table1[] = { > > 1400000, 1350000, 1300000, 1250000, 1200000, 1150000, > > 1100000, 1050000, > > }; > > > > So 1310000 is not among the supported voltages but mediatek-cpufreq.c > > will repeatedly call > > regulator_set_voltage(sram_reg, 1310000, 1310000); > > which will fail for obvious reasons. > > > > Using 1350000 for proc_max_volt and sram_max_volt like I have > > suggested > > as a simple work-around does work because 1350000 is among the > > supported > > voltages of the MT6380 regulator. > > > > On MT7623 the whole problem is anyway non-existent because there is > > no > > separate sram-supply, hence the tracking algorithm isn't used at all. > > > > Exactly. > > For MT7622 platform data, I think it is proper to configure as: > .proc_max_volt = 1310000, > .sram_max_volt = 1350000, // since mt6380_vm_reg ldo only supporting > {..., 1300000, 1350000, 1400000} as you mentioned. Unfortunately that also doesn't work. The tracking algorithm then apparently still tries to set unsupported voltages, I assume that your suggestion will result in SRAM voltage being requested as 1310000uV (proc_max_volt) + 200000uV (max_step_size) = 1330000uV which also isn't supported by the regulator. [ 1.972654] cpu cpu0: cpu0: failed to scale up voltage! [ 1.977951] cpufreq: __target_index: Failed to change cpu frequency: -22 [ 1.984776] cpu cpu0: cpu0: failed to scale up voltage! [ 1.990039] cpufreq: __target_index: Failed to change cpu frequency: -22 ... With my initial suggestion to set both, proc_max_volt and sram_max_volt to 1350000 it does work. However, I think we are now botching around with work-arounds not addressing the underlying problems which are that a) the tracking algorithm initially tries to raise the SRAM voltage to be **exactly** the minimum of proc_max_volt + max_step_size or sram_max_volt. b) requesting an exact voltage, ie. regulator_set_voltage(reg, X, X), is always problematic in case of regulators only supporting a limited set of supported voltages. While adjusting the voltages in the SoC's platform data as a work-around may be good enough as a hot-fix for now, imho the best would be to re-write the tracking algorithm addressing both of the above flaws. > For MT7623 platform data, it is required to add a new one. > .proc_max_volt = 1300000, > .sram_max_volt = 0, // since no sram-supply like you said. > > If MT7622 and MT7623 supplied voltage issues can be fixed by above > platform data, feel free to send the fix patch or inform me to do that. I've introduced dedicated platform_data for MT7623 setting proc_max_volt to 1300000, and yes, that does work. However, on MT7623 there has not been any problem before as well. > > Thanks for your help! :) > > > > > > > Thanks. > > > > > > > > > > > > > You probably meant to write > > > > > vproc_max = min(proc_max_volt, opp_vproc_max); > > > > > vsram_max = min(sram_max_volt, vsram_vreg_max); > > > > > > > > > > right? > > > > > > > > > > > > > Apparently, some of my braincells was apparently taking a break. > > > > :-) > > > > > > > > Yes, I was meaning min(), not max() :-) > > > > > > > > Cheers! > > > > > > > > > > > > > > > > Jia-Wei, can you please handle this? > > > > > > > > > > > > Thanks, > > > > > > Angelo > > > > > > > > > > > > > > > > > > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by 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=?utf-8?B?KOmSn+i+sCk=?= , "error27@gmail.com" Subject: Re: [PATCH v2 4/4] cpufreq: mediatek: Raise proc and sram max voltage for MT7622/7623 Message-ID: References: <20230324101130.14053-1-jia-wei.chang@mediatek.com> <20230324101130.14053-5-jia-wei.chang@mediatek.com> <3054e2d9-7f77-a22a-293d-382f19494079@collabora.com> <4e5a8202f7446481def19e5926d1bfd6e6568dd7.camel@mediatek.com> <5dc13e13143aaffc4477fb9dcf565070cf1a9822.camel@mediatek.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <5dc13e13143aaffc4477fb9dcf565070cf1a9822.camel@mediatek.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230526_032737_098295_130275F6 X-CRM114-Status: GOOD ( 66.34 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org T24gRnJpLCBNYXkgMjYsIDIwMjMgYXQgMDg6Mjc6MjVBTSArMDAwMCwgSmlhLXdlaSBDaGFuZyAo 5by15L2z5YGJKSB3cm90ZToKPiBPbiBXZWQsIDIwMjMtMDUtMjQgYXQgMTM6NDIgKzAxMDAsIERh bmllbCBHb2xsZSB3cm90ZToKPiA+IE9uIFdlZCwgTWF5IDI0LCAyMDIzIGF0IDA4OjQzOjMxQU0g KzAwMDAsIEppYS13ZWkgQ2hhbmcgKOW8teS9s+WBiSkgd3JvdGU6Cj4gPiA+IE9uIFdlZCwgMjAy My0wNS0yNCBhdCAwOToyOCArMDIwMCwgQW5nZWxvR2lvYWNjaGlubyBEZWwgUmVnbm8gd3JvdGU6 Cj4gPiA+ID4gSWwgMjMvMDUvMjMgMTk6MzcsIERhbmllbCBHb2xsZSBoYSBzY3JpdHRvOgo+ID4g PiA+ID4gT24gVHVlLCBNYXkgMjMsIDIwMjMgYXQgMDQ6NTY6NDdQTSArMDIwMCwgQW5nZWxvR2lv YWNjaGlubyBEZWwKPiA+ID4gPiA+IFJlZ25vIHdyb3RlOgo+ID4gPiA+ID4gPiBJbCAyMi8wNS8y MyAyMDowMywgRGFuaWVsIEdvbGxlIGhhIHNjcml0dG86Cj4gPiA+ID4gPiA+ID4gSGkgSmlhLVdl aSwKPiA+ID4gPiA+ID4gPiBIaSBBbmdlbG9HaW9hY2NoaW5vLAo+ID4gPiA+ID4gPiA+IAo+ID4g PiA+ID4gPiA+IE9uIEZyaSwgTWFyIDI0LCAyMDIzIGF0IDA2OjExOjMwUE0gKzA4MDAsIGppYS13 ZWkuY2hhbmcKPiA+ID4gPiA+ID4gPiB3cm90ZToKPiA+ID4gPiA+ID4gPiA+IEZyb206IEFuZ2Vs b0dpb2FjY2hpbm8gRGVsIFJlZ25vIDwKPiA+ID4gPiA+ID4gPiA+IGFuZ2Vsb2dpb2FjY2hpbm8u ZGVscmVnbm9AY29sbGFib3JhLmNvbT4KPiA+ID4gPiA+ID4gPiA+IAo+ID4gPiA+ID4gPiA+ID4g RHVyaW5nIHRoZSBhZGRpdGlvbiBvZiBTUkFNIHZvbHRhZ2UgdHJhY2tpbmcgZm9yIENDSQo+ID4g PiA+ID4gPiA+ID4gc2NhbGluZywKPiA+ID4gPiA+ID4gPiA+IHRoaXMKPiA+ID4gPiA+ID4gPiA+ IGRyaXZlciBnb3Qgc29tZSB2b2x0YWdlIGxpbWl0cyBzZXQgZm9yIHRoZSB2dHJhY2sKPiA+ID4g PiA+ID4gPiA+IGFsZ29yaXRobToKPiA+ID4gPiA+ID4gPiA+IHRoZXNlCj4gPiA+ID4gPiA+ID4g PiB3ZXJlIG1vdmVkIHRvIHBsYXRmb3JtIGRhdGEgZmlyc3QsIHRoZW4gZW5mb3JjZWQgaW4gYQo+ ID4gPiA+ID4gPiA+ID4gbGF0ZXIKPiA+ID4gPiA+ID4gPiA+IGNvbW1pdAo+ID4gPiA+ID4gPiA+ ID4gNmExN2IzODc2YmM4ICgiY3B1ZnJlcTogbWVkaWF0ZWs6IFJlZmluZQo+ID4gPiA+ID4gPiA+ ID4gbXRrX2NwdWZyZXFfdm9sdGFnZV90cmFja2luZygpIikKPiA+ID4gPiA+ID4gPiA+IHVzaW5n IHRoZXNlIGFzIG1heCB2YWx1ZXMgZm9yIHRoZSByZWd1bGF0b3Jfc2V0X3ZvbHRhZ2UoKQo+ID4g PiA+ID4gPiA+ID4gY2FsbHMuCj4gPiA+ID4gPiA+ID4gPiAKPiA+ID4gPiA+ID4gPiA+IEluIHRo aXMgY2FzZSwgdGhlIHZzcmFtL3Zwcm9jIGNvbnN0cmFpbnRzIGZvciBNVDc2MjIgYW5kCj4gPiA+ ID4gPiA+ID4gPiBNVDc2MjMKPiA+ID4gPiA+ID4gPiA+IHdlcmUgc3VwcG9zZWQgdG8gYmUgdGhl IHNhbWUgYXMgTVQyNzAxIChhbmQgYSBudW1iZXIgb2YKPiA+ID4gPiA+ID4gPiA+IG90aGVyCj4g PiA+ID4gPiA+ID4gPiBTb0NzKSwKPiA+ID4gPiA+ID4gPiA+IGJ1dCB0aGF0IHR1cm5lZCBvdXQg dG8gYmUgYSBtaXN0YWtlIGJlY2F1c2UgdGhlCj4gPiA+ID4gPiA+ID4gPiBhZm9yZW1lbnRpb25l ZCB0d28KPiA+ID4gPiA+ID4gPiA+IFNvQ3MnIG1heGltdW0gdm9sdGFnZSBmb3IgYm90aCBWUFJP QyBhbmQgVlBST0NfU1JBTSBpcwo+ID4gPiA+ID4gPiA+ID4gMS4zNlYuCj4gPiA+ID4gPiA+ID4g PiAKPiA+ID4gPiA+ID4gPiA+IEZpeCB0aGF0IGJ5IGFkZGluZyBuZXcgcGxhdGZvcm0gZGF0YSBm b3IgTVQ3NjIyLzc2MjMKPiA+ID4gPiA+ID4gPiA+IGRlY2xhcmluZyB0aGUKPiA+ID4gPiA+ID4g PiA+IHJpZ2h0IHtwcm9jLHNyYW19X21heF92b2x0IHBhcmFtZXRlci4KPiA+ID4gPiA+ID4gPiA+ IAo+ID4gPiA+ID4gPiA+ID4gRml4ZXM6IGVhZDg1OGJkMTI4ZCAoImNwdWZyZXE6IG1lZGlhdGVr OiBNb3ZlIHZvbHRhZ2UKPiA+ID4gPiA+ID4gPiA+IGxpbWl0cwo+ID4gPiA+ID4gPiA+ID4gdG8g cGxhdGZvcm0gZGF0YSIpCj4gPiA+ID4gPiA+ID4gPiBGaXhlczogNmExN2IzODc2YmM4ICgiY3B1 ZnJlcTogbWVkaWF0ZWs6IFJlZmluZQo+ID4gPiA+ID4gPiA+ID4gbXRrX2NwdWZyZXFfdm9sdGFn ZV90cmFja2luZygpIikKPiA+ID4gPiA+ID4gPiA+IFNpZ25lZC1vZmYtYnk6IEFuZ2Vsb0dpb2Fj Y2hpbm8gRGVsIFJlZ25vIDwKPiA+ID4gPiA+ID4gPiA+IGFuZ2Vsb2dpb2FjY2hpbm8uZGVscmVn bm9AY29sbGFib3JhLmNvbT4KPiA+ID4gPiA+ID4gPiA+IFNpZ25lZC1vZmYtYnk6IEppYS1XZWkg Q2hhbmcgPGppYS13ZWkuY2hhbmdAbWVkaWF0ZWsuY29tPgo+ID4gPiA+ID4gPiA+ID4gLS0tCj4g PiA+ID4gPiA+ID4gPiAgICBkcml2ZXJzL2NwdWZyZXEvbWVkaWF0ZWstY3B1ZnJlcS5jIHwgMTMg KysrKysrKysrKystLQo+ID4gPiA+ID4gPiA+ID4gICAgMSBmaWxlIGNoYW5nZWQsIDExIGluc2Vy dGlvbnMoKyksIDIgZGVsZXRpb25zKC0pCj4gPiA+ID4gPiA+ID4gPiAKPiA+ID4gPiA+ID4gPiA+ IGRpZmYgLS1naXQgYS9kcml2ZXJzL2NwdWZyZXEvbWVkaWF0ZWstY3B1ZnJlcS5jCj4gPiA+ID4g PiA+ID4gPiBiL2RyaXZlcnMvY3B1ZnJlcS9tZWRpYXRlay1jcHVmcmVxLmMKPiA+ID4gPiA+ID4g PiA+IGluZGV4IDc2NGU0ZmJkZDUzNi4uOWEzOWE3Y2NmYWU5IDEwMDY0NAo+ID4gPiA+ID4gPiA+ ID4gLS0tIGEvZHJpdmVycy9jcHVmcmVxL21lZGlhdGVrLWNwdWZyZXEuYwo+ID4gPiA+ID4gPiA+ ID4gKysrIGIvZHJpdmVycy9jcHVmcmVxL21lZGlhdGVrLWNwdWZyZXEuYwo+ID4gPiA+ID4gPiA+ ID4gQEAgLTY5Myw2ICs2OTMsMTUgQEAgc3RhdGljIGNvbnN0IHN0cnVjdAo+ID4gPiA+ID4gPiA+ ID4gbXRrX2NwdWZyZXFfcGxhdGZvcm1fZGF0YSBtdDI3MDFfcGxhdGZvcm1fZGF0YSA9IHsKPiA+ ID4gPiA+ID4gPiA+ICAgICAgICAgICAgLmNjaWZyZXFfc3VwcG9ydGVkID0gZmFsc2UsCj4gPiA+ ID4gPiA+ID4gPiAgICB9Owo+ID4gPiA+ID4gPiA+ID4gK3N0YXRpYyBjb25zdCBzdHJ1Y3QgbXRr X2NwdWZyZXFfcGxhdGZvcm1fZGF0YQo+ID4gPiA+ID4gPiA+ID4gbXQ3NjIyX3BsYXRmb3JtX2Rh dGEgPSB7Cj4gPiA+ID4gPiA+ID4gPiArICAubWluX3ZvbHRfc2hpZnQgPSAxMDAwMDAsCj4gPiA+ ID4gPiA+ID4gPiArICAubWF4X3ZvbHRfc2hpZnQgPSAyMDAwMDAsCj4gPiA+ID4gPiA+ID4gPiAr ICAucHJvY19tYXhfdm9sdCA9IDEzNjAwMDAsCj4gPiA+ID4gPiA+ID4gPiArICAuc3JhbV9taW5f dm9sdCA9IDAsCj4gPiA+ID4gPiA+ID4gPiArICAuc3JhbV9tYXhfdm9sdCA9IDEzNjAwMDAsCj4g PiA+ID4gPiA+ID4gCj4gPiA+ID4gPiA+ID4gVGhpcyBjaGFuZ2UgYnJlYWtzIGNwdWZyZXEgKHdp dGggb25kZW1hbmQgc2NoZWR1bGVyKSBvbiBteQo+ID4gPiA+ID4gPiA+IEJQaQo+ID4gPiA+ID4g PiA+IFI2NAo+ID4gPiA+ID4gPiA+IGJvYXJkIChoYXZpbmcgTVQ3NjIyQVYgU29DIHdpdGggTVQ2 MzgwTiBQTUlDKS4KPiA+ID4gPiA+ID4gPiAuLi4KPiA+ID4gPiA+ID4gPiBbICAgIDIuNTQwMDkx XSBjcHVmcmVxOiBfX3RhcmdldF9pbmRleDogRmFpbGVkIHRvIGNoYW5nZQo+ID4gPiA+ID4gPiA+ IGNwdQo+ID4gPiA+ID4gPiA+IGZyZXF1ZW5jeTogLTIyCj4gPiA+ID4gPiA+ID4gWyAgICAyLjU1 Njk4NV0gY3B1IGNwdTA6IGNwdTA6IGZhaWxlZCB0byBzY2FsZSB1cCB2b2x0YWdlIQo+ID4gPiA+ ID4gPiA+IC4uLgo+ID4gPiA+ID4gPiA+IChyZXBlYXRpbmcgYSBsb3QsIGV2ZXJ5IHRpbWUgdGhl IGhpZ2hlc3Qgb3BlcmF0aW5nIHBvaW50IGlzCj4gPiA+ID4gPiA+ID4gc2VsZWN0ZWQKPiA+ID4g PiA+ID4gPiBieSB0aGUgY3B1ZnJlcSBnb3Zlcm5vcikKPiA+ID4gPiA+ID4gPiAKPiA+ID4gPiA+ ID4gPiBUaGUgcmVhc29uIGlzIHRoYXQgdGhlIE1UNjM4ME4gZG9lc24ndCBzdXBwb3J0IDEzNjAw MDB1ViBvbgo+ID4gPiA+ID4gPiA+IHRoZQo+ID4gPiA+ID4gPiA+IHN1cHBseQo+ID4gPiA+ID4g PiA+IG91dHB1dHMgdXNlZCBmb3IgU1JBTSBhbmQgcHJvY2Vzc29yLgo+ID4gPiA+ID4gPiA+IAo+ ID4gPiA+ID4gPiA+IEFzIGZvciBzb21lIHJlYXNvbiBjcHVmcmVxLW1lZGlhdGVrIHRyaWVzIHRv IHJpc2UgdGhlIFNSQU0KPiA+ID4gPiA+ID4gPiBzdXBwbHkKPiA+ID4gPiA+ID4gPiB2b2x0YWdl IHRvIHRoZSBtYXhpbXVtIGZvciBhIHNob3J0IG1vbWVudCAocHJvYmFibHkgYSBzaWRlLQo+ID4g PiA+ID4gPiA+IGVmZmVjdCBvZgo+ID4gPiA+ID4gPiA+IHRoZSB2b2x0YWdlIHRyYWNraW5nIGFs Z29yaXRobSksIHRoaXMgZmFpbHMgYmVjYXVzZSB0aGUKPiA+ID4gPiA+ID4gPiBQTUlDCj4gPiA+ ID4gPiA+ID4gb25seQo+ID4gPiA+ID4gPiA+IHN1cHBvcnRzIHVwIHRvIDEzNTAwMDB1Vi4gQXMg dGhlIGhpZ2hlc3Qgb3BlcmF0aW5nIHBvaW50IGlzCj4gPiA+ID4gPiA+ID4gYW55d2F5Cj4gPiA+ ID4gPiA+ID4gdXNpbmcgb25seSAxMzEwMDAwdVYgdGhlIHNpbXBsZSBmaXggaXMgc2V0dGluZyAx MzUwMDAwdVYgYXMKPiA+ID4gPiA+ID4gPiB0aGUKPiA+ID4gPiA+ID4gPiBtYXhpbXVtCj4gPiA+ ID4gPiA+ID4gaW5zdGVhZCBmb3IgYm90aCBwcm9jX21heF92b2x0IGFuZCBzcmFtX21heF92b2x0 Lgo+ID4gPiA+ID4gPiA+IAo+ID4gPiA+ID4gPiA+IEEgc2ltaWxhciBzaXR1YXRpb24gYXBwbGll cyBhbHNvIGZvciBCUGkgUjIgKE1UNzYyM05JIHdpdGgKPiA+ID4gPiA+ID4gPiBNVDYzMjNMCj4g PiA+ID4gPiA+ID4gUE1JQyksIGhlcmUgdGhlIG1heGltdW0gc3VwcG9ydGVkIHZvbHRhZ2Ugb2Yg dGhlIFBNSUMgd2hpY2gKPiA+ID4gPiA+ID4gPiBhbHNvIG9ubHkKPiA+ID4gPiA+ID4gPiBzdXBw b3J0cyB1cCB0byAxMzUwMDAwdVYsIGFuZCB0aGUgU29DIGhhdmluZyBpdHMgaGlnaGVzdAo+ID4g PiA+ID4gPiA+IG9wZXJhdGluZwo+ID4gPiA+ID4gPiA+IHZvbHRhZ2UgZGVmaW5lZCBhdCAxMzAw MDAwdVYuCj4gPiA+ID4gPiA+ID4gCj4gPiA+ID4gPiA+ID4gSWYgYWxsIGFncmVlIHdpdGggdGhl IHNpbXBsZSBmaXggSSB3aWxsIHBvc3QgYSBwYXRjaCBmb3IKPiA+ID4gPiA+ID4gPiB0aGF0Lgo+ ID4gPiA+ID4gPiA+IAo+ID4gPiA+ID4gPiA+IEhvd2V2ZXIsIHRvIG1lIGl0IGZlZWxzIGZpc2h5 IHRvIGJlZ2luIHdpdGggdGhhdCB0aGUKPiA+ID4gPiA+ID4gPiB0cmFja2luZwo+ID4gPiA+ID4g PiA+IGFsZ29yaXRobQo+ID4gPiA+ID4gPiA+IHRyaWVzIHRvIHJpc2UgdGhlIHZvbHRhZ2UgYWJv dmUgdGhlIGhpZ2hlc3Qgb3BlcmF0aW5nIHBvaW50Cj4gPiA+ID4gPiA+ID4gZGVmaW5lZCBpbgo+ ID4gPiA+ID4gPiA+IGRldmljZSB0cmVlLCBzZWUgaGVyZToKPiA+ID4gPiA+ID4gPiAKPiA+ID4g PiA+ID4gPiA2YTE3YjM4NzZiYzgzMCBkcml2ZXJzL2NwdWZyZXEvbWVkaWF0ZWstY3B1ZnJlcS5j IChKaWEtV2VpCj4gPiA+ID4gPiA+ID4gQ2hhbmcgICAgICAgICAgICAgIDIwMjItMDUtMDUgMTk6 NTI6MjAgKzA4MDAKPiA+ID4gPiA+ID4gPiAxMDApICAgIG5ld192c3JhbQo+ID4gPiA+ID4gPiA+ ID0gY2xhbXAobmV3X3Zwcm9jICsgc29jX2RhdGEtPm1pbl92b2x0X3NoaWZ0LAo+ID4gPiA+ID4g PiA+IDZhMTdiMzg3NmJjODMwIGRyaXZlcnMvY3B1ZnJlcS9tZWRpYXRlay1jcHVmcmVxLmMgKEpp YS1XZWkKPiA+ID4gPiA+ID4gPiBDaGFuZyAgICAgICAgICAgICAgMjAyMi0wNS0wNSAxOTo1Mjoy MCArMDgwMAo+ID4gPiA+ID4gPiA+IDEwMSkgICAgICAgICAgICAgICAgICAgICAgc29jX2RhdGEt PnNyYW1fbWluX3ZvbHQsCj4gPiA+ID4gPiA+ID4gc29jX2RhdGEtCj4gPiA+ID4gPiA+ID4gPiBz cmFtX21heF92b2x0KTsKPiA+ID4gPiA+ID4gPiAKPiA+ID4gPiA+ID4gPiBIb3dldmVyLCBJIGRp ZCBub3QgaW52ZXN0aWdhdGUgaW4gZGVwdGggdGhlIHB1cnBvc2Ugb2YgdGhpcwo+ID4gPiA+ID4g PiA+IGluaXRpYWwgcmlzZSBhbmQgY2FuIGltcG9zc2libHkgdGVzdCBteSBtb2RpZmljYXRpb25z IHRvCj4gPiA+ID4gPiA+ID4gdGhlCj4gPiA+ID4gPiA+ID4gdHJhY2tpbmcgYWxnb3JpdGhtIG9u IGFsbCBzdXBwb3J0ZWQgU29Dcy4KPiA+ID4gPiA+ID4gPiAKPiA+ID4gPiA+ID4gCj4gPiA+ID4g PiA+IFRoYW5rcyBmb3IgYWN0dWFsbHkgcmVwb3J0aW5nIHRoYXQsIEkgZG9uJ3QgdGhpbmsgdGhh dAo+ID4gPiA+ID4gPiB0aGVyZSdzCj4gPiA+ID4gPiA+IGFueQo+ID4gPiA+ID4gPiB2YWxpZCBy ZWFzb24gd2h5IHRoZSBhbGdvcml0aG0gc2hvdWxkIHNldCBhIHZvbHRhZ2UgaGlnaGVyCj4gPiA+ ID4gPiA+IHRoYW4KPiA+ID4gPiA+ID4gdGhlCj4gPiA+ID4gPiA+IG1heGltdW0gdm90YWdlIHNw ZWNpZmllZCBpbiB0aGUgZmFzdGVzdCBPUFAuCj4gPiA+ID4gPiA+IAo+ID4gPiA+ID4gPiBBbnl3 YXkgLSB0aGUgbG9naWMgZm9yIHRoZSBwbGF0Zm9ybSBkYXRhIG9mIHRoaXMgZHJpdmVyIGlzIHRv Cj4gPiA+ID4gPiA+IGRlY2xhcmUKPiA+ID4gPiA+ID4gdGhlIG1heGltdW0gdm9sdGFnZSB0aGF0 IFNvQyBtb2RlbCBYIHN1cHBvcnRzLCByZWdhcmRsZXNzIG9mCj4gPiA+ID4gPiA+IHRoZQo+ID4g PiA+ID4gPiBhY3R1YWwKPiA+ID4gPiA+ID4gYm9hcmQtc3BlY2lmaWMgT1BQcywgc28gdGhhdCBw YXJ0IGlzIHJpZ2h0OyB0byBzb2x2ZSB0aGlzCj4gPiA+ID4gPiA+IGlzc3VlLAo+ID4gPiA+ID4g PiBJIGd1ZXNzCj4gPiA+ID4gPiA+IHRoYXQgdGhlIG9ubHkgd2F5IGlzIGZvciB0aGlzIGRyaXZl ciB0byBwYXJzZSB0aGUgT1BQcyBkdXJpbmcKPiA+ID4gPiA+ID4gLnByb2JlKCkKPiA+ID4gPiA+ ID4gYW5kIHRoZW4gYWx3YXlzIHVzZSBpbiB0aGUgYWxnb3JpdGhtCj4gPiA+ID4gPiA+IAo+ID4g PiA+ID4gPiAgICAgIHZwcm9jX21heCA9IG1heChwcm9jX21heF92b2x0LCBvcHBfdnByb2NfbWF4 KTsKPiA+ID4gPiA+ID4gICAgICB2c3JhbV9tYXggPSBtYXgoc3JhbV9tYXhfdm9sdCwgdnNyYW1f dnJlZ19tYXgpOwo+ID4gPiAKPiA+ID4gSGkgRGFuaWVsLCBBbmdlbG8gU2lyLAo+ID4gPiAKPiA+ ID4gVGhhbmtzIGZvciB0aGUgaXNzdWUgcmVwb3J0IGFuZCBzdWdnZXN0aW9ucy4KPiA+ID4gCj4g PiA+IElzIGl0IHBvc3NpYmxlIHRvIG1vZGlmeSB0aGUgdmFsdWUgb2YgcHJvY19tYXhfdm9sdCBh bmQKPiA+ID4gc3JhbV9tYXhfdm9sdAo+ID4gPiB0byAxMzEwMDAwIGluIG10NzYyMl9wbGF0Zm9y bV9kYXRhIGFzIHRoZSBoaWdoZXN0IHZvbHRhZ2UgZGVjbGFyZWQKPiA+ID4gaW4KPiA+ID4gbXQ3 NjIyLmR0c2kgYW5kIHRoZW4gZ2l2ZSBpdCBhIHRyeT8KPiA+ID4gCj4gPiA+IFNvcnJ5LCBJIG5l ZWQgc29tZW9uZSBoZWxwIHRvIGNoZWNrIHRoaXMgb24gbXQ3NjIyIHNpbmNlIEkgZG9uJ3QKPiA+ ID4gaGF2ZQo+ID4gPiBtdDc2MjIgcGxhdGZvcm0uLgo+ID4gCj4gPiBVbmZvcnR1bmF0ZWx5IGFs c28gc2V0dGluZyBwcm9jX21heF92b2x0IGFuZCBzcmFtX21heF92b2x0IHRvIDEzMTAwMDAKPiA+ IGRvZXNuJ3Qgd29yazoKPiA+IFsgICAgMS45ODMzMjVdIGNwdSBjcHUwOiBjcHUwOiBmYWlsZWQg dG8gc2NhbGUgdXAgdm9sdGFnZSEKPiA+IFsgICAgMS45ODg2MjFdIGNwdWZyZXE6IF9fdGFyZ2V0 X2luZGV4OiBGYWlsZWQgdG8gY2hhbmdlIGNwdQo+ID4gZnJlcXVlbmN5OiAtMjIKPiA+IDo6cmVw ZWF0aW5nIGluZmluaXRlbHk6Ogo+ID4gCj4gPiBUaGlzIGlzIGJlY2F1c2UgaW4gbXQ2MzgwLXJl Z3VsYXRvci5jIHlvdSBjYW4gc2VlCj4gPiBzdGF0aWMgY29uc3QgdW5zaWduZWQgaW50IGxkb192 b2x0X3RhYmxlMVtdID0gewo+ID4gICAgICAgICAxNDAwMDAwLCAxMzUwMDAwLCAxMzAwMDAwLCAx MjUwMDAwLCAxMjAwMDAwLCAxMTUwMDAwLAo+ID4gMTEwMDAwMCwgMTA1MDAwMCwKPiA+IH07Cj4g PiAKPiA+IFNvIDEzMTAwMDAgaXMgbm90IGFtb25nIHRoZSBzdXBwb3J0ZWQgdm9sdGFnZXMgYnV0 IG1lZGlhdGVrLWNwdWZyZXEuYwo+ID4gd2lsbCByZXBlYXRlZGx5IGNhbGwKPiA+IHJlZ3VsYXRv cl9zZXRfdm9sdGFnZShzcmFtX3JlZywgMTMxMDAwMCwgMTMxMDAwMCk7Cj4gPiB3aGljaCB3aWxs IGZhaWwgZm9yIG9idmlvdXMgcmVhc29ucy4KPiA+IAo+ID4gVXNpbmcgMTM1MDAwMCBmb3IgcHJv Y19tYXhfdm9sdCBhbmQgc3JhbV9tYXhfdm9sdCBsaWtlIEkgaGF2ZQo+ID4gc3VnZ2VzdGVkCj4g PiBhcyBhIHNpbXBsZSB3b3JrLWFyb3VuZCBkb2VzIHdvcmsgYmVjYXVzZSAxMzUwMDAwIGlzIGFt b25nIHRoZQo+ID4gc3VwcG9ydGVkCj4gPiB2b2x0YWdlcyBvZiB0aGUgTVQ2MzgwIHJlZ3VsYXRv ci4KPiA+IAo+ID4gT24gTVQ3NjIzIHRoZSB3aG9sZSBwcm9ibGVtIGlzIGFueXdheSBub24tZXhp c3RlbnQgYmVjYXVzZSB0aGVyZSBpcwo+ID4gbm8KPiA+IHNlcGFyYXRlIHNyYW0tc3VwcGx5LCBo ZW5jZSB0aGUgdHJhY2tpbmcgYWxnb3JpdGhtIGlzbid0IHVzZWQgYXQgYWxsLgo+ID4gCj4gCj4g RXhhY3RseS4KPiAKPiBGb3IgTVQ3NjIyIHBsYXRmb3JtIGRhdGEsIEkgdGhpbmsgaXQgaXMgcHJv cGVyIHRvIGNvbmZpZ3VyZSBhczoKPiAucHJvY19tYXhfdm9sdCA9IDEzMTAwMDAsCj4gLnNyYW1f bWF4X3ZvbHQgPSAxMzUwMDAwLCAgLy8gc2luY2UgbXQ2MzgwX3ZtX3JlZyBsZG8gb25seSBzdXBw b3J0aW5nCj4gey4uLiwgMTMwMDAwMCwgMTM1MDAwMCwgMTQwMDAwMH0gYXMgeW91IG1lbnRpb25l ZC4KClVuZm9ydHVuYXRlbHkgdGhhdCBhbHNvIGRvZXNuJ3Qgd29yay4gVGhlIHRyYWNraW5nIGFs Z29yaXRobSB0aGVuCmFwcGFyZW50bHkgc3RpbGwgdHJpZXMgdG8gc2V0IHVuc3VwcG9ydGVkIHZv bHRhZ2VzLCBJIGFzc3VtZSB0aGF0CnlvdXIgc3VnZ2VzdGlvbiB3aWxsIHJlc3VsdCBpbiBTUkFN IHZvbHRhZ2UgYmVpbmcgcmVxdWVzdGVkIGFzCjEzMTAwMDB1ViAocHJvY19tYXhfdm9sdCkgKyAy MDAwMDB1ViAobWF4X3N0ZXBfc2l6ZSkgPSAxMzMwMDAwdVYKd2hpY2ggYWxzbyBpc24ndCBzdXBw b3J0ZWQgYnkgdGhlIHJlZ3VsYXRvci4KClsgICAgMS45NzI2NTRdIGNwdSBjcHUwOiBjcHUwOiBm YWlsZWQgdG8gc2NhbGUgdXAgdm9sdGFnZSEKWyAgICAxLjk3Nzk1MV0gY3B1ZnJlcTogX190YXJn ZXRfaW5kZXg6IEZhaWxlZCB0byBjaGFuZ2UgY3B1IGZyZXF1ZW5jeTogLTIyClsgICAgMS45ODQ3 NzZdIGNwdSBjcHUwOiBjcHUwOiBmYWlsZWQgdG8gc2NhbGUgdXAgdm9sdGFnZSEKWyAgICAxLjk5 MDAzOV0gY3B1ZnJlcTogX190YXJnZXRfaW5kZXg6IEZhaWxlZCB0byBjaGFuZ2UgY3B1IGZyZXF1 ZW5jeTogLTIyCi4uLgoKV2l0aCBteSBpbml0aWFsIHN1Z2dlc3Rpb24gdG8gc2V0IGJvdGgsIHBy b2NfbWF4X3ZvbHQgYW5kIHNyYW1fbWF4X3ZvbHQKdG8gMTM1MDAwMCBpdCBkb2VzIHdvcmsuCgpI b3dldmVyLCBJIHRoaW5rIHdlIGFyZSBub3cgYm90Y2hpbmcgYXJvdW5kIHdpdGggd29yay1hcm91 bmRzIG5vdAphZGRyZXNzaW5nIHRoZSB1bmRlcmx5aW5nIHByb2JsZW1zIHdoaWNoIGFyZSB0aGF0 CiBhKSB0aGUgdHJhY2tpbmcgYWxnb3JpdGhtIGluaXRpYWxseSB0cmllcyB0byByYWlzZSB0aGUg U1JBTSB2b2x0YWdlIHRvCiAgICBiZSAqKmV4YWN0bHkqKiB0aGUgbWluaW11bSBvZiBwcm9jX21h eF92b2x0ICsgbWF4X3N0ZXBfc2l6ZSBvcgogICAgc3JhbV9tYXhfdm9sdC4KIGIpIHJlcXVlc3Rp bmcgYW4gZXhhY3Qgdm9sdGFnZSwgaWUuIHJlZ3VsYXRvcl9zZXRfdm9sdGFnZShyZWcsIFgsIFgp LAogICAgaXMgYWx3YXlzIHByb2JsZW1hdGljIGluIGNhc2Ugb2YgcmVndWxhdG9ycyBvbmx5IHN1 cHBvcnRpbmcgYQogICAgbGltaXRlZCBzZXQgb2Ygc3VwcG9ydGVkIHZvbHRhZ2VzLgoKV2hpbGUg YWRqdXN0aW5nIHRoZSB2b2x0YWdlcyBpbiB0aGUgU29DJ3MgcGxhdGZvcm0gZGF0YSBhcyBhCndv cmstYXJvdW5kIG1heSBiZSBnb29kIGVub3VnaCBhcyBhIGhvdC1maXggZm9yIG5vdywgaW1obyB0 aGUgYmVzdAp3b3VsZCBiZSB0byByZS13cml0ZSB0aGUgdHJhY2tpbmcgYWxnb3JpdGhtIGFkZHJl c3NpbmcgYm90aCBvZiB0aGUKYWJvdmUgZmxhd3MuCgo+IEZvciBNVDc2MjMgcGxhdGZvcm0gZGF0 YSwgaXQgaXMgcmVxdWlyZWQgdG8gYWRkIGEgbmV3IG9uZS4KPiAucHJvY19tYXhfdm9sdCA9IDEz MDAwMDAsCj4gLnNyYW1fbWF4X3ZvbHQgPSAwLCAgLy8gc2luY2Ugbm8gc3JhbS1zdXBwbHkgbGlr ZSB5b3Ugc2FpZC4KPiAKPiBJZiBNVDc2MjIgYW5kIE1UNzYyMyBzdXBwbGllZCB2b2x0YWdlIGlz c3VlcyBjYW4gYmUgZml4ZWQgYnkgYWJvdmUKPiBwbGF0Zm9ybSBkYXRhLCBmZWVsIGZyZWUgdG8g c2VuZCB0aGUgZml4IHBhdGNoIG9yIGluZm9ybSBtZSB0byBkbyB0aGF0LgoKSSd2ZSBpbnRyb2R1 Y2VkIGRlZGljYXRlZCBwbGF0Zm9ybV9kYXRhIGZvciBNVDc2MjMgc2V0dGluZwpwcm9jX21heF92 b2x0IHRvIDEzMDAwMDAsIGFuZCB5ZXMsIHRoYXQgZG9lcyB3b3JrLgpIb3dldmVyLCBvbiBNVDc2 MjMgdGhlcmUgaGFzIG5vdCBiZWVuIGFueSBwcm9ibGVtIGJlZm9yZSBhcyB3ZWxsLgoKCj4gCj4g VGhhbmtzIGZvciB5b3VyIGhlbHAhIDopCj4gCj4gPiA+IAo+ID4gPiBUaGFua3MuCj4gPiA+IAo+ ID4gPiA+ID4gCj4gPiA+ID4gPiBZb3UgcHJvYmFibHkgbWVhbnQgdG8gd3JpdGUKPiA+ID4gPiA+ IHZwcm9jX21heCA9IG1pbihwcm9jX21heF92b2x0LCBvcHBfdnByb2NfbWF4KTsKPiA+ID4gPiA+ IHZzcmFtX21heCA9IG1pbihzcmFtX21heF92b2x0LCB2c3JhbV92cmVnX21heCk7Cj4gPiA+ID4g PiAKPiA+ID4gPiA+IHJpZ2h0Pwo+ID4gPiA+ID4gCj4gPiA+ID4gCj4gPiA+ID4gQXBwYXJlbnRs eSwgc29tZSBvZiBteSBicmFpbmNlbGxzIHdhcyBhcHBhcmVudGx5IHRha2luZyBhIGJyZWFrLgo+ ID4gPiA+IDotKQo+ID4gPiA+IAo+ID4gPiA+IFllcywgSSB3YXMgbWVhbmluZyBtaW4oKSwgbm90 IG1heCgpIDotKQo+ID4gPiA+IAo+ID4gPiA+IENoZWVycyEKPiA+ID4gPiAKPiA+ID4gPiA+ID4g Cj4gPiA+ID4gPiA+IEppYS1XZWksIGNhbiB5b3UgcGxlYXNlIGhhbmRsZSB0aGlzPwo+ID4gPiA+ ID4gPiAKPiA+ID4gPiA+ID4gVGhhbmtzLAo+ID4gPiA+ID4gPiBBbmdlbG8KPiA+ID4gPiA+ID4g Cj4gPiA+ID4gCj4gPiA+ID4gCj4gPiA+ID4gCgpfX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fXwpsaW51eC1hcm0ta2VybmVsIG1haWxpbmcgbGlzdApsaW51eC1h cm0ta2VybmVsQGxpc3RzLmluZnJhZGVhZC5vcmcKaHR0cDovL2xpc3RzLmluZnJhZGVhZC5vcmcv bWFpbG1hbi9saXN0aW5mby9saW51eC1hcm0ta2VybmVsCg==