From: Vinod Koul <vkoul@kernel.org>
To: Bard Liao <yung-chuan.liao@linux.intel.com>
Cc: alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org,
pierre-louis.bossart@linux.intel.com, bard.liao@intel.com
Subject: Re: [PATCH] soundwire: intel: read AC timing control register before updating it
Date: Sat, 27 May 2023 16:08:55 +0530 [thread overview]
Message-ID: <ZHHdvx4cDFIiX27s@matsya> (raw)
In-Reply-To: <20230515081301.12921-1-yung-chuan.liao@linux.intel.com>
On 15-05-23, 16:13, Bard Liao wrote:
> From: Chao Song <chao.song@linux.intel.com>
>
> Start from ACE1.x, DOAISE is added to AC timing control
> register bit 5, it combines with DOAIS to get effective
> timing, and has the default value 1.
>
> The current code fills DOAIS, DACTQE and DODS bits to a
> variable initialized to zero, and updates the variable
> to AC timing control register. With this operation, We
> change DOAISE to 0, and force a much more aggressive
> timing. The timing is even unable to form a working
> waveform on SDA pin on Meteorlake.
>
> This patch uses read-modify-write operation for the AC
> timing control register access, thus makes sure those
> bits not supposed and intended to change are not touched.
Applied, thanks
--
~Vinod
prev parent reply other threads:[~2023-05-27 10:42 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-15 8:13 [PATCH] soundwire: intel: read AC timing control register before updating it Bard Liao
2023-05-27 10:38 ` Vinod Koul [this message]
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