From: Catalin Marinas <catalin.marinas@arm.com>
To: Jamie Iles <quic_jiles@quicinc.com>
Cc: Anshuman Khandual <anshuman.khandual@arm.com>,
linux-arm-kernel@lists.infradead.org,
Will Deacon <will@kernel.org>,
Mark Rutland <mark.rutland@arm.com>
Subject: Re: [PATCH] arm64/mm: remove now-superfluous ISBs from TTBR writes
Date: Wed, 14 Jun 2023 11:27:07 +0100 [thread overview]
Message-ID: <ZImV++azNSrz5Xq8@arm.com> (raw)
In-Reply-To: <ZImR4vE0Yd7F53yh@JILES.na.qualcomm.com>
On Wed, Jun 14, 2023 at 11:09:38AM +0100, Jamie Iles wrote:
> On Wed, Jun 14, 2023 at 03:35:03PM +0530, Anshuman Khandual wrote:
> > On 6/13/23 19:49, Jamie Iles wrote:
> > > At the time of authoring 7655abb95386 ("arm64: mm: Move ASID from TTBR0
> > > to TTBR1"), the Arm ARM did not specify any ordering guarantees for
> > > direct writes to TTBR0_ELx and TTBR1_ELx and so an ISB was required
> > > after each write to ensure TLBs would only be populated from the
> > > expected (or reserved tables).
> > >
> > > In a recent update to the Arm ARM, the requirements have been relaxed to
> > > reflect the implementation of current CPUs and required implementation
> > > of future CPUs to read (RDYDPX in D8.2.3 Translation table base address
> > > register):
> >
> > But what about the existing CPUs that might still require an ISB after
> > each individual write into TTBR0/1_EL1 ? Would they be impacted if the
> > ISB get dropped ?
>
> For this retrospective change Arm verify that this is the current
> behaviour of existing CPUs both by Arm Ltd and licensees. There should
> be no current CPUs that require these ISBs.
Indeed. If we do come across one, we may have to bring some of these
back as errata workaround.
--
Catalin
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next prev parent reply other threads:[~2023-06-14 10:27 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-13 14:19 [PATCH] arm64/mm: remove now-superfluous ISBs from TTBR writes Jamie Iles
2023-06-14 10:05 ` Anshuman Khandual
2023-06-14 10:09 ` Jamie Iles
2023-06-14 10:27 ` Catalin Marinas [this message]
2023-06-15 9:26 ` Mark Rutland
2023-06-15 17:11 ` Catalin Marinas
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