Re: [PATCH v1 2/5] KVM: arm64: Disable SME Traps for (h)VHE at setup

[Oliver Upton <oliver.upton@linux.dev>]

On Wed, Jul 19, 2023 at 04:06:36PM +0100, Fuad Tabba wrote:
> Ensure that SME traps are disabled for (h)VHE when setting up
> EL2, as they are for nVHE.
> 
> Signed-off-by: Fuad Tabba <tabba@google.com>
> ---
>  arch/arm64/include/asm/el2_setup.h | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h
> index c106b31d776c..7001b6db3ccc 100644
> --- a/arch/arm64/include/asm/el2_setup.h
> +++ b/arch/arm64/include/asm/el2_setup.h
> @@ -292,9 +292,21 @@
>  	check_override id_aa64pfr1, ID_AA64PFR1_EL1_SME_SHIFT, .Linit_sme_\@, .Lskip_sme_\@, x1, x2
>  
>  .Linit_sme_\@:	/* SME register access and priority mapping */
> +	mrs	x1, hcr_el2
> +	and	x1, x1, #HCR_E2H
> +	cbz	x1, .Lcptr_nvhe_sme_\@

Hmm.. Our test for hVHE is repeated enough times, it might make sense
for readability to wrap it up in a macro:

.macro check_hvhe pass, fail, tmp
	mrs	\tmp, hcr_el2
	and	\tmp, \tmp, #HCR_E2H
	cbnz	\tmp, \pass
	b	\fail
.endm

So long as we tolerate the additional word of bloat for the extra branch
:)

> +	// (h)VHE case
> +	mrs	x0, cpacr_el1			// Disable SME traps
> +	orr	x0, x0, #(CPACR_EL1_SMEN_EL0EN | CPACR_EL1_SMEN_EL1EN)
> +	msr	cpacr_el1, x0
> +	b	.Lskip_set_cptr_sme_\@
> +
> +.Lcptr_nvhe_sme_\@: // nVHE case
>  	mrs	x0, cptr_el2			// Disable SME traps
>  	bic	x0, x0, #CPTR_EL2_TSM
>  	msr	cptr_el2, x0
> +.Lskip_set_cptr_sme_\@:
>  	isb
>  
>  	mrs	x1, sctlr_el2
> -- 
> 2.41.0.255.g8b1d071c50-goog
> 

-- 
Thanks,
Oliver