All of lore.kernel.org
 help / color / mirror / Atom feed
From: Jason Gunthorpe <jgg@ziepe.ca>
To: Vasant Hegde <vasant.hegde@amd.com>
Cc: iommu@lists.linux.dev, joro@8bytes.org,
	suravee.suthikulpanit@amd.com, wei.huang2@amd.com,
	jsnitsel@redhat.com
Subject: Re: [PATCH v2 06/16] iommu/amd: Introduce helper functions for managing GCR3 table
Date: Fri, 28 Jul 2023 11:09:48 -0300	[thread overview]
Message-ID: <ZMPMLD9NX3JUI0uS@ziepe.ca> (raw)
In-Reply-To: <20230728053609.165183-7-vasant.hegde@amd.com>

On Fri, Jul 28, 2023 at 05:35:59AM +0000, Vasant Hegde wrote:
> From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
> 
> Refactor domain_enable_v2() into helper functions for managing GCR3 table
> (i.e. setup_gcr3_table() and get_gcr3_levels()), which will be used in
> subsequent patches. Also re-arrange code and remove forward declaration.

It makes alot of sense to change the name like this
 
> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
> Co-developed-by: Vasant Hegde <vasant.hegde@amd.com>
> Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
> ---
>  drivers/iommu/amd/iommu.c | 63 ++++++++++++++++++++++-----------------
>  1 file changed, 36 insertions(+), 27 deletions(-)
> 
> diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
> index 09749ad4445c..3c14c49d6d72 100644
> --- a/drivers/iommu/amd/iommu.c
> +++ b/drivers/iommu/amd/iommu.c
> @@ -77,7 +77,6 @@ struct iommu_cmd {
>  struct kmem_cache *amd_iommu_irq_cache;
>  
>  static void detach_device(struct device *dev);
> -static int domain_enable_v2(struct protection_domain *domain, int pasids);
>  
>  /****************************************************************************
>   *
> @@ -1575,6 +1574,40 @@ static void free_gcr3_table(struct protection_domain *domain)
>  	free_page((unsigned long)domain->gcr3_tbl);
>  }
>  
> +static int get_gcr3_levels(int pasids)
> +{
> +	int levels = 0;
> +
> +	if (pasids == -1)
> +		return amd_iommu_max_glx_val;
> +
> +	/* Number of GCR3 table levels required */
> +	for ( ; (pasids != 0) && ((pasids - 1) & ~0x1ff); pasids >>= 9)
> +		levels += 1;

This can surely be a closed expression, something like:

DIV_ROUND_UP(get_count_order(pasids), 9)

?

> +
> +	return levels;
> +}
> +
> +/* Note: This function expects iommu_domain->lock to be held prior calling the function. */
> +static int setup_gcr3_table(struct protection_domain *domain, int pasids)
> +{
> +	int levels = get_gcr3_levels(pasids);
> +
> +	if (levels > amd_iommu_max_glx_val)
> +		return -EINVAL;
> +
> +	domain->gcr3_tbl = (void *)get_zeroed_page(GFP_ATOMIC);

I gather it is recommended to just call kzalloc(PAGE_SIZE) now. And
really this shouldn't be PAGE_SIZE but some constant reflecting the
size of the HW's gcr3 levels.

Jason

  reply	other threads:[~2023-07-28 14:09 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-28  5:35 [PATCH v2 00/16] iommu/amd: SVA Support (Part 1) - cleanup/refactoring Vasant Hegde
2023-07-28  5:35 ` [PATCH v2 01/16] iommu/amd: Remove unused amd_io_pgtable.pt_root variable Vasant Hegde
2023-07-28 13:17   ` Jason Gunthorpe
2023-07-28  5:35 ` [PATCH v2 02/16] iommu/amd: Consolidate timeout pre-define to amd_iommu_type.h Vasant Hegde
2023-07-28 13:48   ` Jason Gunthorpe
2023-07-28  5:35 ` [PATCH v2 03/16] iommu/amd: Consolidate logic to allocate protection domain Vasant Hegde
2023-07-28 13:49   ` Jason Gunthorpe
2023-07-28  5:35 ` [PATCH v2 04/16] iommu/amd: Refactor protection domain allocation code Vasant Hegde
2023-07-28 13:53   ` Jason Gunthorpe
2023-07-31  6:30     ` Vasant Hegde
2023-07-31 12:03       ` Jason Gunthorpe
2023-07-28  5:35 ` [PATCH v2 05/16] iommu/amd/iommu_v2: Use protection_domain in struct device_state Vasant Hegde
2023-07-28 14:00   ` Jason Gunthorpe
2023-07-28  5:35 ` [PATCH v2 06/16] iommu/amd: Introduce helper functions for managing GCR3 table Vasant Hegde
2023-07-28 14:09   ` Jason Gunthorpe [this message]
2023-07-31 10:40     ` Vasant Hegde
2023-07-28  5:36 ` [PATCH v2 07/16] iommu/amd: Use struct protection_domain in helper functions Vasant Hegde
2023-07-28 14:10   ` Jason Gunthorpe
2023-07-28  5:36 ` [PATCH v2 08/16] iommu/amd: Do not set amd_iommu_pgtable in pass-through mode Vasant Hegde
2023-07-28 14:11   ` Jason Gunthorpe
2023-07-31  6:35     ` Vasant Hegde
2023-07-28  5:36 ` [PATCH v2 09/16] iommu/amd: Miscellaneous clean up when free domain Vasant Hegde
2023-07-28 14:13   ` Jason Gunthorpe
2023-07-31  9:39     ` Vasant Hegde
2023-07-28  5:36 ` [PATCH v2 10/16] iommu/amd: Modify logic for checking GT and PPR features Vasant Hegde
2023-07-28 14:24   ` Jason Gunthorpe
2023-07-31 11:51     ` Vasant Hegde
2023-07-28  5:36 ` [PATCH v2 11/16] iommu/amd: Rename ats related variables Vasant Hegde
2023-07-28 14:27   ` Jason Gunthorpe
2023-07-31  9:15     ` Vasant Hegde
2023-07-28  5:36 ` [PATCH v2 12/16] iommu/amd: Add support for different types of PPR handler Vasant Hegde
2023-07-28 14:31   ` Jason Gunthorpe
2023-07-31  8:02     ` Vasant Hegde
2023-07-31 12:11       ` Jason Gunthorpe
2023-07-31 12:28         ` Vasant Hegde
2023-07-28  5:36 ` [PATCH v2 13/16] iommu/amd: Introduce iommu_dev_data.flags to track device capabilities Vasant Hegde
2023-07-28 14:38   ` Jason Gunthorpe
2023-07-31  7:57     ` Vasant Hegde
2023-07-31 12:08       ` Jason Gunthorpe
2023-08-04  6:40         ` Vasant Hegde
2023-07-28  5:36 ` [PATCH v2 14/16] iommu/amd: Enable device ATS/PASID/PRI capabilities independently Vasant Hegde
2023-07-28 14:40   ` Jason Gunthorpe
2023-07-28  5:36 ` [PATCH v2 15/16] iommu/amd: Initialize iommu_device->max_pasids Vasant Hegde
2023-07-28 14:46   ` Jason Gunthorpe
2023-07-31  7:03     ` Vasant Hegde
2023-07-31 12:07       ` Jason Gunthorpe
2023-07-31 16:04         ` Vasant Hegde
2023-07-28  5:36 ` [PATCH v2 16/16] iommu/amd: Simplify amd_iommu_device_info() Vasant Hegde
2023-07-28 14:47   ` Jason Gunthorpe

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=ZMPMLD9NX3JUI0uS@ziepe.ca \
    --to=jgg@ziepe.ca \
    --cc=iommu@lists.linux.dev \
    --cc=joro@8bytes.org \
    --cc=jsnitsel@redhat.com \
    --cc=suravee.suthikulpanit@amd.com \
    --cc=vasant.hegde@amd.com \
    --cc=wei.huang2@amd.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.