From: Du Huanpeng <dhu@hodcarrier.org>
To: Tom Rini <trini@konsulko.com>
Cc: u-boot@lists.denx.de, u74147@gmail.com
Subject: Re: [PATCH v5 3/6] mips: add a ls1c300 based board
Date: Sat, 29 Jul 2023 17:02:56 +0800 [thread overview]
Message-ID: <ZMTVwKyEi+w6crgc@b1ack> (raw)
In-Reply-To: <20230728143501.GY3630934@bill-the-cat>
On Fri, Jul 28, 2023 at 10:35:01AM -0400, Tom Rini wrote:
> On Fri, Jul 28, 2023 at 10:59:16AM +0800, Du Huanpeng wrote:
> > On Thu, Jul 27, 2023 at 03:05:28PM -0400, Tom Rini wrote:
> > > On Wed, Jul 26, 2023 at 08:30:24PM +0800, Du Huanpeng wrote:
> > >
> > > > - devicetree for ls1c300 SoC and board
> > this devicetree was writen from scratch, I read the SoC's manual
> > and devicetree-specification-v0.3.pdf, and write a Excel to generate
> > it.
> > the v0.3 was lastest version when I wrote it.
> > https://www.devicetree.org/specifications/
> > the manual seens not available now from official site,
> > https://www.loongson.cn/product/list?id=2
> > here is my backup:
> > https://github.com/hodcarrier/ls1c300_bsp
>
> The device tree in U-Boot needs to be kept in sync with the device tree
> in Linux. I haven't been following loongarch closely so I don't know
> the state of upstreaming the work there. We can be a little bit
> flexible when it comes to new platforms / chips, but we can't be "two
> different source trees".
thanks for this imformation, there is no devicetree for this SoC in current
upstream kernel. I will try to sync this devicetree to Linux.
by the way, ls1c300 is MIPS chip, this patch is nothing about loongarch.
loongarch is another architecture name. :)
>
> --
> Tom
---
Du Huanpeng
next prev parent reply other threads:[~2023-07-29 9:00 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-26 12:30 [PATCH v5 0/6] add loongson mips ls1c300 initial support Du Huanpeng
2023-07-26 12:30 ` [PATCH v5 1/6] mips: initial build infrastructure for loongson SoCs Du Huanpeng
2023-07-27 19:05 ` Tom Rini
2023-07-26 12:30 ` [PATCH v5 2/6] mips: ls1c300: add base support Du Huanpeng
2023-07-27 20:46 ` Tom Rini
2023-07-26 12:30 ` [PATCH v5 3/6] mips: add a ls1c300 based board Du Huanpeng
2023-07-27 19:05 ` Tom Rini
2023-07-28 2:59 ` Du Huanpeng
2023-07-28 14:35 ` Tom Rini
2023-07-29 9:02 ` Du Huanpeng [this message]
2023-07-26 12:30 ` [PATCH v5 4/6] mips: ls1c300: add clock driver Du Huanpeng
2023-07-26 12:30 ` [PATCH v5 5/6] mips: ls1c300: add watchdog support Du Huanpeng
2023-07-26 12:30 ` [PATCH v5 6/6] mips: ls1c300: add reset support based on watchdog driver Du Huanpeng
2023-07-27 20:46 ` [PATCH v5 0/6] add loongson mips ls1c300 initial support Tom Rini
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ZMTVwKyEi+w6crgc@b1ack \
--to=dhu@hodcarrier.org \
--cc=trini@konsulko.com \
--cc=u-boot@lists.denx.de \
--cc=u74147@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.