From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 05EABC001DB for ; Mon, 7 Aug 2023 14:30:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233921AbjHGOaP (ORCPT ); Mon, 7 Aug 2023 10:30:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43248 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232879AbjHGOaI (ORCPT ); Mon, 7 Aug 2023 10:30:08 -0400 Received: from mail-pl1-x649.google.com (mail-pl1-x649.google.com [IPv6:2607:f8b0:4864:20::649]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 43E5C10CF for ; Mon, 7 Aug 2023 07:30:05 -0700 (PDT) Received: by mail-pl1-x649.google.com with SMTP id d9443c01a7336-1bbbc4ae328so35603385ad.1 for ; Mon, 07 Aug 2023 07:30:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1691418605; x=1692023405; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=bMdPzG2XrCBcIhVHkWNK3nWK0wLFcxVC5hw4AAEh6/o=; b=r+pL34KOKCyCvT1G6ujMdYSsC+crCp5k626T+yQFecWvtFUQ1hf0pqfn3YDsJ/9MCe XgoOpSipaVd1TJGBElPgSMYRBZwWMyleJsuAHgioDjuxBzdsQRfw+pWAw14w/98Ebwne 8rFuc+wzPBMLyeiPXpvIKUNXsn/1a+QC8grStbv8jVZZNhHnvvvDrNZBWRcOYFiK3nxt GrDnM8OsLDSVxp3PN9+4FFiuPV+zJf0jR6XmgQzFSAl/M0Nn1aKHZDBHBy32tB+394A3 VA0ooqPDPOzMGDu1c3/MCB4ECYeeYsf/ZARv6vtUTb0v12spGSddiSTHJ+svdK6g/I7h uHzQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1691418605; x=1692023405; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=bMdPzG2XrCBcIhVHkWNK3nWK0wLFcxVC5hw4AAEh6/o=; b=Fg8RdTP3enz3M+xEbyQnvZg1efNo/Pyqth9RtnOriCh3CX7VyDVMVIIGIxoRy//4mW dqMMPif4O6udEMnjnA+c3x/mZ6Sc5EUmCiqjs7b/Tp07OVGFc2rQLmqsq0UI/9VuEpJl I/4BiEEpBiIhrad0Y4q8O6q3TKPhAS9BVEhDpsOr17Bec/TAhB/rmZjC5J05kOnDoPR5 Fpsc5PZiG3FPtmH8Pr8CWVfCZESZAGbC9eXu7C1YJb011nnXPIHMKu49KxeVgTJyADai 9VX6HYYhWnMSY3uNOz+BkpjhNNdJ8eoOG9Hs7GRTL31FHiKqegE2bOJW6t8U6GBgFY7x pigw== X-Gm-Message-State: AOJu0YzPTLndkIBOYlcWcMqZBfXwsVZxW9qkq+onoOvqPDAyBElIUC3l nlmokHdFaJ5LJEwMqXxTo9XGm28JTmk= X-Google-Smtp-Source: AGHT+IGomqVsnwl3zZAfC62MD1t+0pP4FGydWER6MsEYy/PY4td7kLcqKxXda0j7BcBmIz10jftfPDmWgKo= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a17:903:244f:b0:1b8:c666:207a with SMTP id l15-20020a170903244f00b001b8c666207amr38755pls.9.1691418604729; Mon, 07 Aug 2023 07:30:04 -0700 (PDT) Date: Mon, 7 Aug 2023 07:30:03 -0700 In-Reply-To: <030a485fb852c4604371adc3aeb5511ac6501b88.camel@intel.com> Mime-Version: 1.0 References: <20230806113623.f7am5levfsllpko7@box.shutemov.name> <030a485fb852c4604371adc3aeb5511ac6501b88.camel@intel.com> Message-ID: Subject: Re: [PATCH v3 10/12] x86/virt/tdx: Wire up basic SEAMCALL functions From: Sean Christopherson To: Kai Huang Cc: "kirill.shutemov@linux.intel.com" , Dave Hansen , "x86@kernel.org" , "bp@alien8.de" , "peterz@infradead.org" , "hpa@zytor.com" , "mingo@redhat.com" , "tglx@linutronix.de" , "linux-kernel@vger.kernel.org" , "pbonzini@redhat.com" , Isaku Yamahata , "sathyanarayanan.kuppuswamy@linux.intel.com" , "n.borisov.lkml@gmail.com" Content-Type: text/plain; charset="us-ascii" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Aug 07, 2023, Kai Huang wrote: > > > > > > > +config INTEL_TDX_HOST > > > + bool "Intel Trust Domain Extensions (TDX) host support" > > > + depends on CPU_SUP_INTEL > > > + depends on X86_64 > > > + depends on KVM_INTEL > > > > Hm. I expected KVM_INTEL to depend on CPU_SUP_INTEL, but apparently no. > > Any reasons why? > > Hmm.. Not sure :-) Centuar and Zhaoxin CPUs also support VMX. commit 8f63aaf5c493c6502a058585cdfa3c71cdf8c44a Author: Sean Christopherson Date: Fri Dec 20 20:45:13 2019 -0800 KVM: VMX: Allow KVM_INTEL when building for Centaur and/or Zhaoxin CPUs Change the dependency for KVM_INTEL, i.e. KVM w/ VMX, from Intel CPUs to any CPU that supports the IA32_FEAT_CTL MSR and thus VMX functionality. This effectively allows building KVM_INTEL for Centaur and Zhaoxin CPUs.