From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Manasi Navare <navaremanasi@chromium.org>
Cc: Jani Nikula <jani.nikula@intel.com>, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH] drm/i915/display/vrr: Compute VRR min/max based on highest clock mode for DRRS panel
Date: Thu, 24 Aug 2023 14:45:33 +0300 [thread overview]
Message-ID: <ZOdC3Wq4_oD4W90H@intel.com> (raw)
In-Reply-To: <20230823235159.2140276-1-navaremanasi@chromium.org>
On Wed, Aug 23, 2023 at 11:51:59PM +0000, Manasi Navare wrote:
> In case of a DRRS panel, there is a preferred panel mode and there is
> a downclock mode with lower pixel clock. But the Vtotal for both remains
> the same. This means even in downclocking mode the VRR Vtotal min/max
> should remain the same.
> So in this case always use the highest clock mode to compute VRR
> parameters.
NAK. The VRR parameters must be calculated based on the actual timings
used. Trying to make seamless DRRS and VRR coexist nicely might be a
doomed idea. Not 100% sure though since I haven't really thought
through all the combinations.
>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Signed-off-by: Manasi Navare <navaremanasi@chromium.org>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 4 ++--
> drivers/gpu/drm/i915/display/intel_dp.h | 2 ++
> drivers/gpu/drm/i915/display/intel_vrr.c | 7 ++++---
> 3 files changed, 8 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 7067ee3a4bd3..c572a018ce57 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1509,8 +1509,8 @@ static bool has_seamless_m_n(struct intel_connector *connector)
> intel_panel_drrs_type(connector) == DRRS_TYPE_SEAMLESS;
> }
>
> -static int intel_dp_mode_clock(const struct intel_crtc_state *crtc_state,
> - const struct drm_connector_state *conn_state)
> +int intel_dp_mode_clock(const struct intel_crtc_state *crtc_state,
> + const struct drm_connector_state *conn_state)
> {
> struct intel_connector *connector = to_intel_connector(conn_state->connector);
> const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
> index 788a577ebe16..3c9866356359 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> @@ -119,6 +119,8 @@ u8 intel_dp_dsc_get_slice_count(struct intel_dp *intel_dp,
> bool bigjoiner);
> bool intel_dp_need_bigjoiner(struct intel_dp *intel_dp,
> int hdisplay, int clock);
> +int intel_dp_mode_clock(const struct intel_crtc_state *crtc_state,
> + const struct drm_connector_state *conn_state);
>
> static inline unsigned int intel_dp_unused_lane_mask(int lane_count)
> {
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
> index 88e4759b538b..18a4e0e4e696 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> @@ -8,6 +8,7 @@
> #include "i915_reg.h"
> #include "intel_de.h"
> #include "intel_display_types.h"
> +#include "intel_dp.h"
> #include "intel_vrr.h"
>
> bool intel_vrr_is_capable(struct intel_connector *connector)
> @@ -106,7 +107,7 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
> to_intel_connector(conn_state->connector);
> struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
> const struct drm_display_info *info = &connector->base.display_info;
> - int vmin, vmax;
> + int vmin, vmax, clock = intel_dp_mode_clock(crtc_state, conn_state);
>
> if (!intel_vrr_is_capable(connector))
> return;
> @@ -114,9 +115,9 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
> if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)
> return;
>
> - vmin = DIV_ROUND_UP(adjusted_mode->crtc_clock * 1000,
> + vmin = DIV_ROUND_UP(clock * 1000,
> adjusted_mode->crtc_htotal * info->monitor_range.max_vfreq);
> - vmax = adjusted_mode->crtc_clock * 1000 /
> + vmax = clock * 1000 /
> (adjusted_mode->crtc_htotal * info->monitor_range.min_vfreq);
>
> vmin = max_t(int, vmin, adjusted_mode->crtc_vtotal);
> --
> 2.42.0.rc1.204.g551eb34607-goog
--
Ville Syrjälä
Intel
prev parent reply other threads:[~2023-08-24 11:45 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-23 23:51 [Intel-gfx] [PATCH] drm/i915/display/vrr: Compute VRR min/max based on highest clock mode for DRRS panel Manasi Navare
2023-08-24 2:28 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for " Patchwork
2023-08-24 2:45 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-08-24 8:07 ` [Intel-gfx] [PATCH] " Golani, Mitulkumar Ajitkumar
2023-08-24 10:39 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for " Patchwork
2023-08-24 11:45 ` Ville Syrjälä [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ZOdC3Wq4_oD4W90H@intel.com \
--to=ville.syrjala@linux.intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=jani.nikula@intel.com \
--cc=navaremanasi@chromium.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.