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Thu, 31 Aug 2023 10:05:09 -0700 (PDT) Date: Thu, 31 Aug 2023 10:05:04 -0700 From: Nick Desaulniers To: Andy Chiu Cc: linux-riscv@lists.infradead.org, palmer@dabbelt.com, greentime.hu@sifive.com, guoren@linux.alibaba.com, 20230816155450.26200-4-andy.chiu@sifive.com, bjorn@kernel.org, Paul Walmsley , Albert Ou , Oleg Nesterov , Eric Biederman , Kees Cook , Vincent Chen , Heiko Stuebner , Conor Dooley , Benjamin Gray , Qing Zhang , Baruch Siach , Rolf Eike Beer , llvm@lists.linux.dev, nathan@kernel.org, regressions@leemhuis.info Subject: Re: [v2] RISC-V: Add ptrace support for vectors Message-ID: References: <20230825050248.32681-1-andy.chiu@sifive.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20230825050248.32681-1-andy.chiu@sifive.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230831_100517_290353_60158AD5 X-CRM114-Status: GOOD ( 23.46 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Fri, Aug 25, 2023 at 05:02:46AM +0000, Andy Chiu wrote: > This patch add back the ptrace support with the following fix: > - Define NT_RISCV_CSR and re-number NT_RISCV_VECTOR to prevent > conflicting with gdb's NT_RISCV_CSR. > - Use struct __riscv_v_regset_state to handle ptrace requests > > Since gdb does not directly include the note description header in > Linux and has already defined NT_RISCV_CSR as 0x900, we decide to > sync with gdb and renumber NT_RISCV_VECTOR to solve and prevent future > conflicts. > > Fixes: 0c59922c769a ("riscv: Add ptrace vector support") > Signed-off-by: Andy Chiu Hi Andy, this is causing an instance of -Wunused-variable. PTAL. Please use the following tags on the fix: Reported-by: "kernelci.org bot" Closes: https://lore.kernel.org/linux-next/64f03ea1.170a0220.d3dbf.11fd@mx.google.com/ Let's see if I can get the regzbot tag correct; first time trying it. #regzbot introduced dbe46b094026 > diff --git a/arch/riscv/kernel/ptrace.c b/arch/riscv/kernel/ptrace.c > index 487303e3ef22..9a87e5d490b5 100644 > --- a/arch/riscv/kernel/ptrace.c > +++ b/arch/riscv/kernel/ptrace.c > @@ -81,6 +84,71 @@ static int riscv_fpr_set(struct task_struct *target, > } > #endif > > +#ifdef CONFIG_RISCV_ISA_V > +static int riscv_vr_get(struct task_struct *target, > + const struct user_regset *regset, > + struct membuf to) > +{ > + struct __riscv_v_ext_state *vstate = &target->thread.vstate; > + struct __riscv_v_regset_state ptrace_vstate; > + > + if (!riscv_v_vstate_query(task_pt_regs(target))) > + return -EINVAL; > + > + /* > + * Ensure the vector registers have been saved to the memory before > + * copying them to membuf. > + */ > + if (target == current) > + riscv_v_vstate_save(current, task_pt_regs(current)); > + > + ptrace_vstate.vstart = vstate->vstart; > + ptrace_vstate.vl = vstate->vl; > + ptrace_vstate.vtype = vstate->vtype; > + ptrace_vstate.vcsr = vstate->vcsr; > + ptrace_vstate.vlenb = vstate->vlenb; > + > + /* Copy vector header from vstate. */ > + membuf_write(&to, &ptrace_vstate, sizeof(struct __riscv_v_regset_state)); > + > + /* Copy all the vector registers from vstate. */ > + return membuf_write(&to, vstate->datap, riscv_v_vsize); > +} > + > +static int riscv_vr_set(struct task_struct *target, > + const struct user_regset *regset, > + unsigned int pos, unsigned int count, > + const void *kbuf, const void __user *ubuf) > +{ > + int ret, size; ^ arch/riscv/kernel/ptrace.c:123:11: warning: unused variable 'size' [-Wunused-variable] _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pl1-f179.google.com (mail-pl1-f179.google.com [209.85.214.179]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E58CA182DB for ; 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Thu, 31 Aug 2023 10:05:09 -0700 (PDT) Date: Thu, 31 Aug 2023 10:05:04 -0700 From: Nick Desaulniers To: Andy Chiu Cc: linux-riscv@lists.infradead.org, palmer@dabbelt.com, greentime.hu@sifive.com, guoren@linux.alibaba.com, 20230816155450.26200-4-andy.chiu@sifive.com, bjorn@kernel.org, Paul Walmsley , Albert Ou , Oleg Nesterov , Eric Biederman , Kees Cook , Vincent Chen , Heiko Stuebner , Conor Dooley , Benjamin Gray , Qing Zhang , Baruch Siach , Rolf Eike Beer , llvm@lists.linux.dev, nathan@kernel.org, regressions@leemhuis.info Subject: Re: [v2] RISC-V: Add ptrace support for vectors Message-ID: References: <20230825050248.32681-1-andy.chiu@sifive.com> Precedence: bulk X-Mailing-List: llvm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230825050248.32681-1-andy.chiu@sifive.com> On Fri, Aug 25, 2023 at 05:02:46AM +0000, Andy Chiu wrote: > This patch add back the ptrace support with the following fix: > - Define NT_RISCV_CSR and re-number NT_RISCV_VECTOR to prevent > conflicting with gdb's NT_RISCV_CSR. > - Use struct __riscv_v_regset_state to handle ptrace requests > > Since gdb does not directly include the note description header in > Linux and has already defined NT_RISCV_CSR as 0x900, we decide to > sync with gdb and renumber NT_RISCV_VECTOR to solve and prevent future > conflicts. > > Fixes: 0c59922c769a ("riscv: Add ptrace vector support") > Signed-off-by: Andy Chiu Hi Andy, this is causing an instance of -Wunused-variable. PTAL. Please use the following tags on the fix: Reported-by: "kernelci.org bot" Closes: https://lore.kernel.org/linux-next/64f03ea1.170a0220.d3dbf.11fd@mx.google.com/ Let's see if I can get the regzbot tag correct; first time trying it. #regzbot introduced dbe46b094026 > diff --git a/arch/riscv/kernel/ptrace.c b/arch/riscv/kernel/ptrace.c > index 487303e3ef22..9a87e5d490b5 100644 > --- a/arch/riscv/kernel/ptrace.c > +++ b/arch/riscv/kernel/ptrace.c > @@ -81,6 +84,71 @@ static int riscv_fpr_set(struct task_struct *target, > } > #endif > > +#ifdef CONFIG_RISCV_ISA_V > +static int riscv_vr_get(struct task_struct *target, > + const struct user_regset *regset, > + struct membuf to) > +{ > + struct __riscv_v_ext_state *vstate = &target->thread.vstate; > + struct __riscv_v_regset_state ptrace_vstate; > + > + if (!riscv_v_vstate_query(task_pt_regs(target))) > + return -EINVAL; > + > + /* > + * Ensure the vector registers have been saved to the memory before > + * copying them to membuf. > + */ > + if (target == current) > + riscv_v_vstate_save(current, task_pt_regs(current)); > + > + ptrace_vstate.vstart = vstate->vstart; > + ptrace_vstate.vl = vstate->vl; > + ptrace_vstate.vtype = vstate->vtype; > + ptrace_vstate.vcsr = vstate->vcsr; > + ptrace_vstate.vlenb = vstate->vlenb; > + > + /* Copy vector header from vstate. */ > + membuf_write(&to, &ptrace_vstate, sizeof(struct __riscv_v_regset_state)); > + > + /* Copy all the vector registers from vstate. */ > + return membuf_write(&to, vstate->datap, riscv_v_vsize); > +} > + > +static int riscv_vr_set(struct task_struct *target, > + const struct user_regset *regset, > + unsigned int pos, unsigned int count, > + const void *kbuf, const void __user *ubuf) > +{ > + int ret, size; ^ arch/riscv/kernel/ptrace.c:123:11: warning: unused variable 'size' [-Wunused-variable]