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From: Leo Liang <ycliang@andestech.com>
To: Chanho Park <chanho61.park@samsung.com>
Cc: Rick Chen <rick@andestech.com>, Simon Glass <sjg@chromium.org>,
	<u-boot@lists.denx.de>
Subject: Re: [PATCH v2 2/3] riscv: timer: add timer_get_boot_us for BOOTSTAGE
Date: Mon, 4 Sep 2023 15:01:27 +0800	[thread overview]
Message-ID: <ZPWAx5JcsZRizFxb@swlinux02> (raw)
In-Reply-To: <20230828094938.2061606-3-chanho61.park@samsung.com>

Hi Chanho,

On Mon, Aug 28, 2023 at 06:49:37PM +0900, Chanho Park wrote:
> timer_get_boot_us function is required to record the boot stages as
> us-based timestamp.
> 
> Signed-off-by: Chanho Park <chanho61.park@samsung.com>
> ---
>  drivers/timer/riscv_timer.c | 21 +++++++++++++++++++++
>  1 file changed, 21 insertions(+)
> 
> diff --git a/drivers/timer/riscv_timer.c b/drivers/timer/riscv_timer.c
> index 3627ed79b819..6cb589fcdc45 100644
> --- a/drivers/timer/riscv_timer.c
> +++ b/drivers/timer/riscv_timer.c
> @@ -11,6 +11,7 @@
>   */
>  
>  #include <common.h>
> +#include <div64.h>
>  #include <dm.h>
>  #include <errno.h>
>  #include <timer.h>
> @@ -50,6 +51,26 @@ u64 notrace timer_early_get_count(void)
>  }
>  #endif
>  
> +#if CONFIG_IS_ENABLED(RISCV_SMODE) && CONFIG_IS_ENABLED(BOOTSTAGE)
> +ulong timer_get_boot_us(void)
> +{
> +	int ret;
> +	u64 ticks = 0;
> +	u32 rate;
> +
> +	ret = dm_timer_init();
> +	if (!ret) {
> +		rate = timer_get_rate(gd->timer);
> +		timer_get_count(gd->timer, &ticks);
> +	} else {
> +		rate = RISCV_SMODE_TIMER_FREQ;
> +		ticks = riscv_timer_get_count(NULL);
> +	}
> +
> +	return lldiv(ticks * 1000, (rate / 1000));

Could you elaborate a little how this formula is derived?

Best regards,
Leo

> +}
> +#endif
> +
>  static int riscv_timer_probe(struct udevice *dev)
>  {
>  	struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
> -- 
> 2.39.2
> 

  reply	other threads:[~2023-09-04  7:02 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20230828094952epcas2p31c71a57ef3486cbd75f605057cc8085f@epcas2p3.samsung.com>
2023-08-28  9:49 ` [PATCH v2 0/3] bootstage support for risc-v Chanho Park
2023-08-28  9:49   ` [PATCH v2 1/3] riscv: bootstage: correct bootstage_report guard Chanho Park
2023-09-04  6:41     ` Leo Liang
2023-08-28  9:49   ` [PATCH v2 2/3] riscv: timer: add timer_get_boot_us for BOOTSTAGE Chanho Park
2023-09-04  7:01     ` Leo Liang [this message]
2023-09-04  7:41       ` Chanho Park
2023-08-28  9:49   ` [PATCH v2 3/3] timer: riscv_aclint_timer: " Chanho Park
2023-09-04  7:02     ` Leo Liang
2023-09-04  7:42       ` Chanho Park
2023-09-04 16:48     ` Simon Glass
2023-09-05  5:02       ` Chanho Park

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