From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Manasi Navare <navaremanasi@chromium.org>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 00/12] drm/i915: VRR, LRR, and M/N stuff
Date: Wed, 20 Sep 2023 23:56:01 +0300 [thread overview]
Message-ID: <ZQtcYUN7DPXihbvb@intel.com> (raw)
In-Reply-To: <CAE72mNmgzHnMtwNR0ggO+a=wWvZf-M_AAr_BYc4js-3-sdpc8A@mail.gmail.com>
On Wed, Sep 20, 2023 at 11:54:41AM -0700, Manasi Navare wrote:
> Hi Ville,
>
> After the comments have been addressed, I have completed reviewing the
> patches. Is there anything
> else blocking this from getting merged? Could we get this merged if
> everything looks good?
Series pushed to drm-intel-next, Thanks for the reviews everyone.
>
> Regards
> Manasi
>
> On Fri, Sep 1, 2023 at 6:04 AM Ville Syrjala
> <ville.syrjala@linux.intel.com> wrote:
> >
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Attempt to make VRR, LRR, and M/N updates coexist nicely,
> > allowing fastsets whenever feasible.
> >
> > Lightly smoke tested on my adl.
> >
> > Cc: Manasi Navare <navaremanasi@chromium.org>
> >
> > Ville Syrjälä (12):
> > drm/i915: Move psr unlock out from the pipe update critical section
> > drm/i915: Change intel_pipe_update_{start,end}() calling convention
> > drm/i915: Extract intel_crtc_vblank_evade_scanlines()
> > drm/i915: Enable VRR later during fastsets
> > drm/i915: Adjust seamless_m_n flag behaviour
> > drm/i915: Optimize out redundant M/N updates
> > drm/i915: Relocate is_in_vrr_range()
> > drm/i915: Validate that the timings are within the VRR range
> > drm/i915: Disable VRR during seamless M/N changes
> > drm/i915: Update VRR parameters in fastset
> > drm/i915: Assert that VRR is off during vblank evasion if necessary
> > drm/i915: Implement transcoder LRR for TGL+
> >
> > drivers/gpu/drm/i915/display/intel_atomic.c | 2 +
> > drivers/gpu/drm/i915/display/intel_crtc.c | 110 ++++++++------
> > drivers/gpu/drm/i915/display/intel_crtc.h | 6 +-
> > drivers/gpu/drm/i915/display/intel_display.c | 135 ++++++++++++++----
> > .../drm/i915/display/intel_display_device.h | 1 +
> > .../drm/i915/display/intel_display_types.h | 5 +-
> > drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
> > drivers/gpu/drm/i915/display/intel_panel.c | 17 +--
> > drivers/gpu/drm/i915/display/intel_vrr.c | 18 ++-
> > drivers/gpu/drm/i915/display/intel_vrr.h | 1 +
> > drivers/gpu/drm/i915/i915_reg.h | 1 +
> > 11 files changed, 212 insertions(+), 86 deletions(-)
> >
> > --
> > 2.41.0
> >
--
Ville Syrjälä
Intel
prev parent reply other threads:[~2023-09-20 20:56 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-01 13:04 [Intel-gfx] [PATCH 00/12] drm/i915: VRR, LRR, and M/N stuff Ville Syrjala
2023-09-01 13:04 ` [Intel-gfx] [PATCH 01/12] drm/i915: Move psr unlock out from the pipe update critical section Ville Syrjala
2023-09-07 18:34 ` Manasi Navare
2023-09-11 17:42 ` Golani, Mitulkumar Ajitkumar
2023-09-01 13:04 ` [Intel-gfx] [PATCH 02/12] drm/i915: Change intel_pipe_update_{start, end}() calling convention Ville Syrjala
2023-09-07 18:36 ` Manasi Navare
2023-09-11 17:53 ` Golani, Mitulkumar Ajitkumar
2023-09-01 13:04 ` [Intel-gfx] [PATCH 03/12] drm/i915: Extract intel_crtc_vblank_evade_scanlines() Ville Syrjala
2023-09-11 18:18 ` Golani, Mitulkumar Ajitkumar
2023-09-01 13:04 ` [Intel-gfx] [PATCH 04/12] drm/i915: Enable VRR later during fastsets Ville Syrjala
2023-09-07 18:38 ` Manasi Navare
2023-09-11 18:24 ` Golani, Mitulkumar Ajitkumar
2023-09-01 13:04 ` [Intel-gfx] [PATCH 05/12] drm/i915: Adjust seamless_m_n flag behaviour Ville Syrjala
2023-09-07 18:39 ` Manasi Navare
2023-09-01 13:04 ` [Intel-gfx] [PATCH 06/12] drm/i915: Optimize out redundant M/N updates Ville Syrjala
2023-09-07 18:40 ` Manasi Navare
2023-09-01 13:04 ` [Intel-gfx] [PATCH 07/12] drm/i915: Relocate is_in_vrr_range() Ville Syrjala
2023-09-07 18:43 ` Manasi Navare
2023-09-15 5:38 ` Golani, Mitulkumar Ajitkumar
2023-09-01 13:04 ` [Intel-gfx] [PATCH 08/12] drm/i915: Validate that the timings are within the VRR range Ville Syrjala
2023-09-07 18:44 ` Manasi Navare
2023-09-15 5:39 ` Golani, Mitulkumar Ajitkumar
2023-09-01 13:04 ` [Intel-gfx] [PATCH 09/12] drm/i915: Disable VRR during seamless M/N changes Ville Syrjala
2023-09-07 18:49 ` Manasi Navare
2023-09-08 5:53 ` Ville Syrjälä
2023-09-08 23:29 ` Manasi Navare
2023-09-11 17:46 ` Golani, Mitulkumar Ajitkumar
2023-09-01 13:04 ` [Intel-gfx] [PATCH 10/12] drm/i915: Update VRR parameters in fastset Ville Syrjala
2023-09-14 17:05 ` Sean Paul
2023-09-01 13:04 ` [Intel-gfx] [PATCH 11/12] drm/i915: Assert that VRR is off during vblank evasion if necessary Ville Syrjala
2023-09-07 18:49 ` Manasi Navare
2023-09-15 8:34 ` Golani, Mitulkumar Ajitkumar
2023-09-01 13:04 ` [Intel-gfx] [PATCH 12/12] drm/i915: Implement transcoder LRR for TGL+ Ville Syrjala
2023-09-14 23:21 ` Manasi Navare
2023-09-15 10:23 ` Ville Syrjälä
2023-09-15 10:38 ` [Intel-gfx] [PATCH v2 " Ville Syrjala
2023-09-18 23:16 ` Manasi Navare
2023-09-20 18:47 ` Manasi Navare
2023-09-20 19:40 ` Ville Syrjälä
2023-09-20 20:40 ` Manasi Navare
2023-09-01 16:00 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: VRR, LRR, and M/N stuff Patchwork
2023-09-01 16:00 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-09-01 16:16 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-09-01 18:38 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: VRR, LRR, and M/N stuff (rev2) Patchwork
2023-09-01 18:38 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-09-01 18:58 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-09-02 4:49 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2023-09-15 11:18 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: VRR, LRR, and M/N stuff (rev3) Patchwork
2023-09-15 11:18 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-09-15 11:34 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-09-20 18:54 ` [Intel-gfx] [PATCH 00/12] drm/i915: VRR, LRR, and M/N stuff Manasi Navare
2023-09-20 20:56 ` Ville Syrjälä [this message]
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