diff for duplicates of <ZROPxDPYGDcGm2J/@ghost> diff --git a/a/1.txt b/N1/1.txt index 51e6f78..15d59bf 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,7 +1,7 @@ On Tue, Sep 26, 2023 at 09:44:38AM +0530, Anup Patel wrote: -> On Tue, Sep 26, 2023 at 9:38?AM Anup Patel <apatel@ventanamicro.com> wrote: +> On Tue, Sep 26, 2023 at 9:38 AM Anup Patel <apatel@ventanamicro.com> wrote: > > -> > On Mon, Sep 25, 2023 at 11:18?PM Charlie Jenkins <charlie@rivosinc.com> wrote: +> > On Mon, Sep 25, 2023 at 11:18 PM Charlie Jenkins <charlie@rivosinc.com> wrote: > > > > > > On Mon, Sep 25, 2023 at 07:08:52PM +0530, Anup Patel wrote: > > > > The Veyron-V1 CPU supports custom conditional arithmetic and @@ -49,7 +49,7 @@ On Tue, Sep 26, 2023 at 09:44:38AM +0530, Anup Patel wrote: > > > > > > > > _______________________________________________ > > > > linux-riscv mailing list -> > > > linux-riscv at lists.infradead.org +> > > > linux-riscv@lists.infradead.org > > > > http://lists.infradead.org/mailman/listinfo/linux-riscv > > > > > > I worry about storing vendor extensions in this file. Because vendor @@ -106,7 +106,7 @@ large as it has to contain the extensions of every vendor. > > > > > > - Charlie > > > -> > > [1] https://lore.kernel.org/lkml/20230705-thead_vendor_extensions-v1-2-ad6915349c4d at rivosinc.com/ +> > > [1] https://lore.kernel.org/lkml/20230705-thead_vendor_extensions-v1-2-ad6915349c4d@rivosinc.com/ > > > > > > > Regards, diff --git a/a/content_digest b/N1/content_digest index 5455d8c..62bee41 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -4,15 +4,31 @@ "ref\0CAK9=C2UoKxM+wknB4n8=okyXCCE6t0Vvz4jU_tBW6DMm6Vb3DA@mail.gmail.com\0" "ref\0CAK9=C2X9FpLTW4mDTNUWkoRLAXZonPzhrsOD5xrCfrqKSbaLhg@mail.gmail.com\0" "From\0Charlie Jenkins <charlie@rivosinc.com>\0" - "Subject\0[PATCH v2 2/9] RISC-V: Detect XVentanaCondOps from ISA string\0" + "Subject\0Re: [PATCH v2 2/9] RISC-V: Detect XVentanaCondOps from ISA string\0" "Date\0Tue, 26 Sep 2023 19:13:24 -0700\0" - "To\0kvm-riscv@lists.infradead.org\0" + "To\0Anup Patel <apatel@ventanamicro.com>\0" + "Cc\0Paolo Bonzini <pbonzini@redhat.com>" + Atish Patra <atishp@atishpatra.org> + Palmer Dabbelt <palmer@dabbelt.com> + Paul Walmsley <paul.walmsley@sifive.com> + Conor Dooley <conor@kernel.org> + Rob Herring <robh+dt@kernel.org> + Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> + Shuah Khan <shuah@kernel.org> + Andrew Jones <ajones@ventanamicro.com> + Mayuresh Chitale <mchitale@ventanamicro.com> + devicetree@vger.kernel.org + kvm@vger.kernel.org + kvm-riscv@lists.infradead.org + linux-riscv@lists.infradead.org + linux-kernel@vger.kernel.org + " linux-kselftest@vger.kernel.org\0" "\00:1\0" "b\0" "On Tue, Sep 26, 2023 at 09:44:38AM +0530, Anup Patel wrote:\n" - "> On Tue, Sep 26, 2023 at 9:38?AM Anup Patel <apatel@ventanamicro.com> wrote:\n" + "> On Tue, Sep 26, 2023 at 9:38\342\200\257AM Anup Patel <apatel@ventanamicro.com> wrote:\n" "> >\n" - "> > On Mon, Sep 25, 2023 at 11:18?PM Charlie Jenkins <charlie@rivosinc.com> wrote:\n" + "> > On Mon, Sep 25, 2023 at 11:18\342\200\257PM Charlie Jenkins <charlie@rivosinc.com> wrote:\n" "> > >\n" "> > > On Mon, Sep 25, 2023 at 07:08:52PM +0530, Anup Patel wrote:\n" "> > > > The Veyron-V1 CPU supports custom conditional arithmetic and\n" @@ -60,7 +76,7 @@ "> > > >\n" "> > > > _______________________________________________\n" "> > > > linux-riscv mailing list\n" - "> > > > linux-riscv at lists.infradead.org\n" + "> > > > linux-riscv@lists.infradead.org\n" "> > > > http://lists.infradead.org/mailman/listinfo/linux-riscv\n" "> > >\n" "> > > I worry about storing vendor extensions in this file. Because vendor\n" @@ -117,7 +133,7 @@ "> > >\n" "> > > - Charlie\n" "> > >\n" - "> > > [1] https://lore.kernel.org/lkml/20230705-thead_vendor_extensions-v1-2-ad6915349c4d at rivosinc.com/\n" + "> > > [1] https://lore.kernel.org/lkml/20230705-thead_vendor_extensions-v1-2-ad6915349c4d@rivosinc.com/\n" "> > >\n" "> >\n" "> > Regards,\n" @@ -128,4 +144,4 @@ "\n" - Charlie -ff595c7cda2c4fabf921e7fa7a5f009244d28ba1d15a4fc50fad0f075533dc12 +a6fea4bcebf277c578077c3f3aa1872b2976dcef06be18e11be891cc4a57519d
diff --git a/a/1.txt b/N2/1.txt index 51e6f78..bde73df 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -1,7 +1,7 @@ On Tue, Sep 26, 2023 at 09:44:38AM +0530, Anup Patel wrote: -> On Tue, Sep 26, 2023 at 9:38?AM Anup Patel <apatel@ventanamicro.com> wrote: +> On Tue, Sep 26, 2023 at 9:38 AM Anup Patel <apatel@ventanamicro.com> wrote: > > -> > On Mon, Sep 25, 2023 at 11:18?PM Charlie Jenkins <charlie@rivosinc.com> wrote: +> > On Mon, Sep 25, 2023 at 11:18 PM Charlie Jenkins <charlie@rivosinc.com> wrote: > > > > > > On Mon, Sep 25, 2023 at 07:08:52PM +0530, Anup Patel wrote: > > > > The Veyron-V1 CPU supports custom conditional arithmetic and @@ -49,7 +49,7 @@ On Tue, Sep 26, 2023 at 09:44:38AM +0530, Anup Patel wrote: > > > > > > > > _______________________________________________ > > > > linux-riscv mailing list -> > > > linux-riscv at lists.infradead.org +> > > > linux-riscv@lists.infradead.org > > > > http://lists.infradead.org/mailman/listinfo/linux-riscv > > > > > > I worry about storing vendor extensions in this file. Because vendor @@ -106,7 +106,7 @@ large as it has to contain the extensions of every vendor. > > > > > > - Charlie > > > -> > > [1] https://lore.kernel.org/lkml/20230705-thead_vendor_extensions-v1-2-ad6915349c4d at rivosinc.com/ +> > > [1] https://lore.kernel.org/lkml/20230705-thead_vendor_extensions-v1-2-ad6915349c4d@rivosinc.com/ > > > > > > > Regards, @@ -116,3 +116,8 @@ large as it has to contain the extensions of every vendor. > Anup - Charlie + +_______________________________________________ +linux-riscv mailing list +linux-riscv@lists.infradead.org +http://lists.infradead.org/mailman/listinfo/linux-riscv diff --git a/a/content_digest b/N2/content_digest index 5455d8c..3ed1d4a 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -4,15 +4,31 @@ "ref\0CAK9=C2UoKxM+wknB4n8=okyXCCE6t0Vvz4jU_tBW6DMm6Vb3DA@mail.gmail.com\0" "ref\0CAK9=C2X9FpLTW4mDTNUWkoRLAXZonPzhrsOD5xrCfrqKSbaLhg@mail.gmail.com\0" "From\0Charlie Jenkins <charlie@rivosinc.com>\0" - "Subject\0[PATCH v2 2/9] RISC-V: Detect XVentanaCondOps from ISA string\0" + "Subject\0Re: [PATCH v2 2/9] RISC-V: Detect XVentanaCondOps from ISA string\0" "Date\0Tue, 26 Sep 2023 19:13:24 -0700\0" - "To\0kvm-riscv@lists.infradead.org\0" + "To\0Anup Patel <apatel@ventanamicro.com>\0" + "Cc\0Paolo Bonzini <pbonzini@redhat.com>" + Atish Patra <atishp@atishpatra.org> + Palmer Dabbelt <palmer@dabbelt.com> + Paul Walmsley <paul.walmsley@sifive.com> + Conor Dooley <conor@kernel.org> + Rob Herring <robh+dt@kernel.org> + Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> + Shuah Khan <shuah@kernel.org> + Andrew Jones <ajones@ventanamicro.com> + Mayuresh Chitale <mchitale@ventanamicro.com> + devicetree@vger.kernel.org + kvm@vger.kernel.org + kvm-riscv@lists.infradead.org + linux-riscv@lists.infradead.org + linux-kernel@vger.kernel.org + " linux-kselftest@vger.kernel.org\0" "\00:1\0" "b\0" "On Tue, Sep 26, 2023 at 09:44:38AM +0530, Anup Patel wrote:\n" - "> On Tue, Sep 26, 2023 at 9:38?AM Anup Patel <apatel@ventanamicro.com> wrote:\n" + "> On Tue, Sep 26, 2023 at 9:38\342\200\257AM Anup Patel <apatel@ventanamicro.com> wrote:\n" "> >\n" - "> > On Mon, Sep 25, 2023 at 11:18?PM Charlie Jenkins <charlie@rivosinc.com> wrote:\n" + "> > On Mon, Sep 25, 2023 at 11:18\342\200\257PM Charlie Jenkins <charlie@rivosinc.com> wrote:\n" "> > >\n" "> > > On Mon, Sep 25, 2023 at 07:08:52PM +0530, Anup Patel wrote:\n" "> > > > The Veyron-V1 CPU supports custom conditional arithmetic and\n" @@ -60,7 +76,7 @@ "> > > >\n" "> > > > _______________________________________________\n" "> > > > linux-riscv mailing list\n" - "> > > > linux-riscv at lists.infradead.org\n" + "> > > > linux-riscv@lists.infradead.org\n" "> > > > http://lists.infradead.org/mailman/listinfo/linux-riscv\n" "> > >\n" "> > > I worry about storing vendor extensions in this file. Because vendor\n" @@ -117,7 +133,7 @@ "> > >\n" "> > > - Charlie\n" "> > >\n" - "> > > [1] https://lore.kernel.org/lkml/20230705-thead_vendor_extensions-v1-2-ad6915349c4d at rivosinc.com/\n" + "> > > [1] https://lore.kernel.org/lkml/20230705-thead_vendor_extensions-v1-2-ad6915349c4d@rivosinc.com/\n" "> > >\n" "> >\n" "> > Regards,\n" @@ -126,6 +142,11 @@ "> Regards,\n" "> Anup\n" "\n" - - Charlie + "- Charlie\n" + "\n" + "_______________________________________________\n" + "linux-riscv mailing list\n" + "linux-riscv@lists.infradead.org\n" + http://lists.infradead.org/mailman/listinfo/linux-riscv -ff595c7cda2c4fabf921e7fa7a5f009244d28ba1d15a4fc50fad0f075533dc12 +8605d22729e12a9c708b512b52c2bdae1fd07b0a6cbac2e359f7081d31a54403
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