From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from out-205.mta1.migadu.com (out-205.mta1.migadu.com [95.215.58.205]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 429C529425 for ; Mon, 16 Oct 2023 19:16:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="NRdd9h+V" Date: Mon, 16 Oct 2023 19:15:54 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1697483760; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=aNCjn8kZsLzkn2TfATd/Tc8lLJ9tbwTjRnLW2H/5Bjc=; b=NRdd9h+VWrbgIUGM4R3jmxHqx88SFaakKg/7Te5xg/KGj1dAwk2Z6vmwxV3StaAY887AG4 JAJDTMNcwD4JpEoRrSLACsOhXablsrOtCuDdYSzxS7J4sCXa7Zbshj5rPOjdvqdXd2h8Co mexLF+4BOrVRGGYNMsbrRQ97E0sEBGc= X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. From: Oliver Upton To: Raghavendra Rao Ananta Cc: Sebastian Ott , Marc Zyngier , Alexandru Elisei , James Morse , Suzuki K Poulose , Paolo Bonzini , Zenghui Yu , Shaoqin Huang , Jing Zhang , Reiji Watanabe , Colton Lewis , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org, kvm@vger.kernel.org Subject: Re: [PATCH v7 07/12] KVM: arm64: PMU: Set PMCR_EL0.N for vCPU based on the associated PMU Message-ID: References: <20231009230858.3444834-1-rananta@google.com> <20231009230858.3444834-8-rananta@google.com> Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: X-Migadu-Flow: FLOW_OUT On Mon, Oct 16, 2023 at 12:02:27PM -0700, Raghavendra Rao Ananta wrote: > On Mon, Oct 16, 2023 at 6:35 AM Sebastian Ott wrote: > > > > On Mon, 9 Oct 2023, Raghavendra Rao Ananta wrote: > > > u64 kvm_vcpu_read_pmcr(struct kvm_vcpu *vcpu) > > > { > > > - return __vcpu_sys_reg(vcpu, PMCR_EL0); > > > + u64 pmcr = __vcpu_sys_reg(vcpu, PMCR_EL0) & > > > + ~(ARMV8_PMU_PMCR_N_MASK << ARMV8_PMU_PMCR_N_SHIFT); > > > + > > > + return pmcr | ((u64)vcpu->kvm->arch.pmcr_n << ARMV8_PMU_PMCR_N_SHIFT); > > > } > > > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c > > > index ff0f7095eaca..c750722fbe4a 100644 > > > --- a/arch/arm64/kvm/sys_regs.c > > > +++ b/arch/arm64/kvm/sys_regs.c > > > @@ -745,12 +745,8 @@ static u64 reset_pmcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r) > > > { > > > u64 pmcr; > > > > > > - /* No PMU available, PMCR_EL0 may UNDEF... */ > > > - if (!kvm_arm_support_pmu_v3()) > > > - return 0; > > > - > > > /* Only preserve PMCR_EL0.N, and reset the rest to 0 */ > > > - pmcr = read_sysreg(pmcr_el0) & (ARMV8_PMU_PMCR_N_MASK << ARMV8_PMU_PMCR_N_SHIFT); > > > + pmcr = kvm_vcpu_read_pmcr(vcpu) & (ARMV8_PMU_PMCR_N_MASK << ARMV8_PMU_PMCR_N_SHIFT); > > > > pmcr = ((u64)vcpu->kvm->arch.pmcr_n << ARMV8_PMU_PMCR_N_SHIFT); > > Would that maybe make it more clear what is done here? > > > Since we require the entire PMCR register, and not just the PMCR.N > field, I think using kvm_vcpu_read_pmcr() would be technically > correct, don't you think? No, this isn't using the entire PMCR value, it is just grabbing PMCR_EL0.N. What's the point of doing this in the first place? The implementation of kvm_vcpu_read_pmcr() is populating PMCR_EL0.N using the VM-scoped value. -- Thanks, Oliver From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4A3EBCDB465 for ; Mon, 16 Oct 2023 19:16:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=WEylh9XTO0rLcfyWlIg8+3mybEzXK1S+GjpKKPYc1jA=; b=bbFUMzU0MYaEdy qfLZXbwzXOyKy6ry/nKo87O5Ro4rT/0ZOjOLwdNVWt9F4LvGQLKeMGdknShx2KY9F5W2wvOOVUnIi jWCD33vv0MKMhVtNVLZoOZKirfZ3IpPv13Bk7UzFkIF7MyWvZyKUrfihwYoIL5Wdm1o7dBNAG7pIk oazXYSwEHKCn3EioxWm/WGz7nB+HIzHg5JvC0DQCqJ9nhDLRV9qADNDncBmgOHDzmXeLa7ek2LcYi aZPVx5wjPAaMFLeR/h3eFyVPaNFuVAQvjvOFdxeswxvycqzsyUYAWSHCen06eZKJDFzoKuBN0EhNc ZqXcL4nBZBD8CKlyfoYQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qsT4R-00AOlg-0s; Mon, 16 Oct 2023 19:16:07 +0000 Received: from out-191.mta1.migadu.com ([95.215.58.191]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qsT4N-00AOl7-37 for linux-arm-kernel@lists.infradead.org; Mon, 16 Oct 2023 19:16:06 +0000 Date: Mon, 16 Oct 2023 19:15:54 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1697483760; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=aNCjn8kZsLzkn2TfATd/Tc8lLJ9tbwTjRnLW2H/5Bjc=; b=NRdd9h+VWrbgIUGM4R3jmxHqx88SFaakKg/7Te5xg/KGj1dAwk2Z6vmwxV3StaAY887AG4 JAJDTMNcwD4JpEoRrSLACsOhXablsrOtCuDdYSzxS7J4sCXa7Zbshj5rPOjdvqdXd2h8Co mexLF+4BOrVRGGYNMsbrRQ97E0sEBGc= X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. From: Oliver Upton To: Raghavendra Rao Ananta Cc: Sebastian Ott , Marc Zyngier , Alexandru Elisei , James Morse , Suzuki K Poulose , Paolo Bonzini , Zenghui Yu , Shaoqin Huang , Jing Zhang , Reiji Watanabe , Colton Lewis , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org, kvm@vger.kernel.org Subject: Re: [PATCH v7 07/12] KVM: arm64: PMU: Set PMCR_EL0.N for vCPU based on the associated PMU Message-ID: References: <20231009230858.3444834-1-rananta@google.com> <20231009230858.3444834-8-rananta@google.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-Migadu-Flow: FLOW_OUT X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231016_121604_179020_96DDBF90 X-CRM114-Status: GOOD ( 17.47 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org T24gTW9uLCBPY3QgMTYsIDIwMjMgYXQgMTI6MDI6MjdQTSAtMDcwMCwgUmFnaGF2ZW5kcmEgUmFv IEFuYW50YSB3cm90ZToKPiBPbiBNb24sIE9jdCAxNiwgMjAyMyBhdCA2OjM14oCvQU0gU2ViYXN0 aWFuIE90dCA8c2Vib3R0QHJlZGhhdC5jb20+IHdyb3RlOgo+ID4KPiA+IE9uIE1vbiwgOSBPY3Qg MjAyMywgUmFnaGF2ZW5kcmEgUmFvIEFuYW50YSB3cm90ZToKPiA+ID4gdTY0IGt2bV92Y3B1X3Jl YWRfcG1jcihzdHJ1Y3Qga3ZtX3ZjcHUgKnZjcHUpCj4gPiA+IHsKPiA+ID4gLSAgICAgcmV0dXJu IF9fdmNwdV9zeXNfcmVnKHZjcHUsIFBNQ1JfRUwwKTsKPiA+ID4gKyAgICAgdTY0IHBtY3IgPSBf X3ZjcHVfc3lzX3JlZyh2Y3B1LCBQTUNSX0VMMCkgJgo+ID4gPiArICAgICAgICAgICAgICAgICAg ICAgfihBUk1WOF9QTVVfUE1DUl9OX01BU0sgPDwgQVJNVjhfUE1VX1BNQ1JfTl9TSElGVCk7Cj4g PiA+ICsKPiA+ID4gKyAgICAgcmV0dXJuIHBtY3IgfCAoKHU2NCl2Y3B1LT5rdm0tPmFyY2gucG1j cl9uIDw8IEFSTVY4X1BNVV9QTUNSX05fU0hJRlQpOwo+ID4gPiB9Cj4gPiA+IGRpZmYgLS1naXQg YS9hcmNoL2FybTY0L2t2bS9zeXNfcmVncy5jIGIvYXJjaC9hcm02NC9rdm0vc3lzX3JlZ3MuYwo+ ID4gPiBpbmRleCBmZjBmNzA5NWVhY2EuLmM3NTA3MjJmYmU0YSAxMDA2NDQKPiA+ID4gLS0tIGEv YXJjaC9hcm02NC9rdm0vc3lzX3JlZ3MuYwo+ID4gPiArKysgYi9hcmNoL2FybTY0L2t2bS9zeXNf cmVncy5jCj4gPiA+IEBAIC03NDUsMTIgKzc0NSw4IEBAIHN0YXRpYyB1NjQgcmVzZXRfcG1jcihz dHJ1Y3Qga3ZtX3ZjcHUgKnZjcHUsIGNvbnN0IHN0cnVjdCBzeXNfcmVnX2Rlc2MgKnIpCj4gPiA+ IHsKPiA+ID4gICAgICAgdTY0IHBtY3I7Cj4gPiA+Cj4gPiA+IC0gICAgIC8qIE5vIFBNVSBhdmFp bGFibGUsIFBNQ1JfRUwwIG1heSBVTkRFRi4uLiAqLwo+ID4gPiAtICAgICBpZiAoIWt2bV9hcm1f c3VwcG9ydF9wbXVfdjMoKSkKPiA+ID4gLSAgICAgICAgICAgICByZXR1cm4gMDsKPiA+ID4gLQo+ ID4gPiAgICAgICAvKiBPbmx5IHByZXNlcnZlIFBNQ1JfRUwwLk4sIGFuZCByZXNldCB0aGUgcmVz dCB0byAwICovCj4gPiA+IC0gICAgIHBtY3IgPSByZWFkX3N5c3JlZyhwbWNyX2VsMCkgJiAoQVJN VjhfUE1VX1BNQ1JfTl9NQVNLIDw8IEFSTVY4X1BNVV9QTUNSX05fU0hJRlQpOwo+ID4gPiArICAg ICBwbWNyID0ga3ZtX3ZjcHVfcmVhZF9wbWNyKHZjcHUpICYgKEFSTVY4X1BNVV9QTUNSX05fTUFT SyA8PCBBUk1WOF9QTVVfUE1DUl9OX1NISUZUKTsKPiA+Cj4gPiBwbWNyID0gKCh1NjQpdmNwdS0+ a3ZtLT5hcmNoLnBtY3JfbiA8PCBBUk1WOF9QTVVfUE1DUl9OX1NISUZUKTsKPiA+IFdvdWxkIHRo YXQgbWF5YmUgbWFrZSBpdCBtb3JlIGNsZWFyIHdoYXQgaXMgZG9uZSBoZXJlPwo+ID4KPiBTaW5j ZSB3ZSByZXF1aXJlIHRoZSBlbnRpcmUgUE1DUiByZWdpc3RlciwgYW5kIG5vdCBqdXN0IHRoZSBQ TUNSLk4KPiBmaWVsZCwgSSB0aGluayB1c2luZyBrdm1fdmNwdV9yZWFkX3BtY3IoKSB3b3VsZCBi ZSB0ZWNobmljYWxseQo+IGNvcnJlY3QsIGRvbid0IHlvdSB0aGluaz8KCk5vLCB0aGlzIGlzbid0 IHVzaW5nIHRoZSBlbnRpcmUgUE1DUiB2YWx1ZSwgaXQgaXMganVzdCBncmFiYmluZwpQTUNSX0VM MC5OLgoKV2hhdCdzIHRoZSBwb2ludCBvZiBkb2luZyB0aGlzIGluIHRoZSBmaXJzdCBwbGFjZT8g VGhlIGltcGxlbWVudGF0aW9uIG9mCmt2bV92Y3B1X3JlYWRfcG1jcigpIGlzIHBvcHVsYXRpbmcg UE1DUl9FTDAuTiB1c2luZyB0aGUgVk0tc2NvcGVkIHZhbHVlLgoKLS0gClRoYW5rcywKT2xpdmVy CgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpsaW51eC1h cm0ta2VybmVsIG1haWxpbmcgbGlzdApsaW51eC1hcm0ta2VybmVsQGxpc3RzLmluZnJhZGVhZC5v cmcKaHR0cDovL2xpc3RzLmluZnJhZGVhZC5vcmcvbWFpbG1hbi9saXN0aW5mby9saW51eC1hcm0t a2VybmVsCg==