From: Oliver Upton <oliver.upton@linux.dev>
To: Raghavendra Rao Ananta <rananta@google.com>
Cc: Sebastian Ott <sebott@redhat.com>, Marc Zyngier <maz@kernel.org>,
Alexandru Elisei <alexandru.elisei@arm.com>,
James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Zenghui Yu <yuzenghui@huawei.com>,
Shaoqin Huang <shahuang@redhat.com>,
Jing Zhang <jingzhangos@google.com>,
Reiji Watanabe <reijiw@google.com>,
Colton Lewis <coltonlewis@google.com>,
linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org
Subject: Re: [PATCH v7 07/12] KVM: arm64: PMU: Set PMCR_EL0.N for vCPU based on the associated PMU
Date: Tue, 17 Oct 2023 18:10:53 +0000 [thread overview]
Message-ID: <ZS7OLRy6BwJljOV8@linux.dev> (raw)
In-Reply-To: <CAJHc60w-CsqdYX8JG-CRutwg0UyWmvk1TyoR-y9JBV_mqWUVKw@mail.gmail.com>
On Tue, Oct 17, 2023 at 10:25:50AM -0700, Raghavendra Rao Ananta wrote:
> On Tue, Oct 17, 2023 at 10:09 AM Oliver Upton <oliver.upton@linux.dev> wrote:
> >
> > On Tue, Oct 17, 2023 at 09:58:08AM -0700, Raghavendra Rao Ananta wrote:
> > > On Mon, Oct 16, 2023 at 10:52 PM Oliver Upton <oliver.upton@linux.dev> wrote:
> > > >
> > > > On Mon, Oct 16, 2023 at 02:35:52PM -0700, Raghavendra Rao Ananta wrote:
> > > >
> > > > [...]
> > > >
> > > > > > What's the point of doing this in the first place? The implementation of
> > > > > > kvm_vcpu_read_pmcr() is populating PMCR_EL0.N using the VM-scoped value.
> > > > > >
> > > > > I guess originally the change replaced read_sysreg(pmcr_el0) with
> > > > > kvm_vcpu_read_pmcr(vcpu) to maintain consistency with others.
> > > > > But if you and Sebastian feel that it's an overkill and directly
> > > > > getting the value via vcpu->kvm->arch.pmcr_n is more readable, I'm
> > > > > happy to make the change.
> > > >
> > > > No, I'd rather you delete the line where PMCR_EL0.N altogether.
> > > > reset_pmcr() tries to initialize the field, but your
> > > > kvm_vcpu_read_pmcr() winds up replacing it with pmcr_n.
> > > >
> > > I didn't get this comment. We still do initialize pmcr, but using the
> > > pmcr.n read via kvm_vcpu_read_pmcr() instead of the actual system
> > > register.
> >
> > You have two bits of code trying to do the exact same thing:
> >
> > 1) reset_pmcr() initializes __vcpu_sys_reg(vcpu, PMCR_EL0) with the N
> > field set up.
> >
> > 2) kvm_vcpu_read_pmcr() takes whatever is in __vcpu_sys_reg(vcpu, PMCR_EL0),
> > *masks out* the N field and re-initializes it with vcpu->kvm->arch.pmcr_n
> >
> > Why do you need (1) if you do (2)?
> >
> Okay, I see what you mean now. In that case, let reset_pmcr():
> - Initialize 'pmcr' using vcpu->kvm->arch.pmcr_n
> - Set ARMV8_PMU_PMCR_LC as appropriate in 'pmcr'
> - Write 'pmcr' to the vcpu reg
>
> From here on out, kvm_vcpu_read_pmcr() would read off of this
> initialized value, unless of course, userspace updates the pmcr.n.
> Is this the flow that you were suggesting?
Just squash this in:
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index d1db1f292645..7b54c7843bef 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -743,10 +743,8 @@ static u64 reset_pmselr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
static u64 reset_pmcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
{
- u64 pmcr;
+ u64 pmcr = 0;
- /* Only preserve PMCR_EL0.N, and reset the rest to 0 */
- pmcr = kvm_vcpu_read_pmcr(vcpu) & (ARMV8_PMU_PMCR_N_MASK << ARMV8_PMU_PMCR_N_SHIFT);
if (!kvm_supports_32bit_el0())
pmcr |= ARMV8_PMU_PMCR_LC;
--
Thanks,
Oliver
WARNING: multiple messages have this Message-ID (diff)
From: Oliver Upton <oliver.upton@linux.dev>
To: Raghavendra Rao Ananta <rananta@google.com>
Cc: Sebastian Ott <sebott@redhat.com>, Marc Zyngier <maz@kernel.org>,
Alexandru Elisei <alexandru.elisei@arm.com>,
James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Zenghui Yu <yuzenghui@huawei.com>,
Shaoqin Huang <shahuang@redhat.com>,
Jing Zhang <jingzhangos@google.com>,
Reiji Watanabe <reijiw@google.com>,
Colton Lewis <coltonlewis@google.com>,
linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org
Subject: Re: [PATCH v7 07/12] KVM: arm64: PMU: Set PMCR_EL0.N for vCPU based on the associated PMU
Date: Tue, 17 Oct 2023 18:10:53 +0000 [thread overview]
Message-ID: <ZS7OLRy6BwJljOV8@linux.dev> (raw)
In-Reply-To: <CAJHc60w-CsqdYX8JG-CRutwg0UyWmvk1TyoR-y9JBV_mqWUVKw@mail.gmail.com>
On Tue, Oct 17, 2023 at 10:25:50AM -0700, Raghavendra Rao Ananta wrote:
> On Tue, Oct 17, 2023 at 10:09 AM Oliver Upton <oliver.upton@linux.dev> wrote:
> >
> > On Tue, Oct 17, 2023 at 09:58:08AM -0700, Raghavendra Rao Ananta wrote:
> > > On Mon, Oct 16, 2023 at 10:52 PM Oliver Upton <oliver.upton@linux.dev> wrote:
> > > >
> > > > On Mon, Oct 16, 2023 at 02:35:52PM -0700, Raghavendra Rao Ananta wrote:
> > > >
> > > > [...]
> > > >
> > > > > > What's the point of doing this in the first place? The implementation of
> > > > > > kvm_vcpu_read_pmcr() is populating PMCR_EL0.N using the VM-scoped value.
> > > > > >
> > > > > I guess originally the change replaced read_sysreg(pmcr_el0) with
> > > > > kvm_vcpu_read_pmcr(vcpu) to maintain consistency with others.
> > > > > But if you and Sebastian feel that it's an overkill and directly
> > > > > getting the value via vcpu->kvm->arch.pmcr_n is more readable, I'm
> > > > > happy to make the change.
> > > >
> > > > No, I'd rather you delete the line where PMCR_EL0.N altogether.
> > > > reset_pmcr() tries to initialize the field, but your
> > > > kvm_vcpu_read_pmcr() winds up replacing it with pmcr_n.
> > > >
> > > I didn't get this comment. We still do initialize pmcr, but using the
> > > pmcr.n read via kvm_vcpu_read_pmcr() instead of the actual system
> > > register.
> >
> > You have two bits of code trying to do the exact same thing:
> >
> > 1) reset_pmcr() initializes __vcpu_sys_reg(vcpu, PMCR_EL0) with the N
> > field set up.
> >
> > 2) kvm_vcpu_read_pmcr() takes whatever is in __vcpu_sys_reg(vcpu, PMCR_EL0),
> > *masks out* the N field and re-initializes it with vcpu->kvm->arch.pmcr_n
> >
> > Why do you need (1) if you do (2)?
> >
> Okay, I see what you mean now. In that case, let reset_pmcr():
> - Initialize 'pmcr' using vcpu->kvm->arch.pmcr_n
> - Set ARMV8_PMU_PMCR_LC as appropriate in 'pmcr'
> - Write 'pmcr' to the vcpu reg
>
> From here on out, kvm_vcpu_read_pmcr() would read off of this
> initialized value, unless of course, userspace updates the pmcr.n.
> Is this the flow that you were suggesting?
Just squash this in:
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index d1db1f292645..7b54c7843bef 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -743,10 +743,8 @@ static u64 reset_pmselr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
static u64 reset_pmcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
{
- u64 pmcr;
+ u64 pmcr = 0;
- /* Only preserve PMCR_EL0.N, and reset the rest to 0 */
- pmcr = kvm_vcpu_read_pmcr(vcpu) & (ARMV8_PMU_PMCR_N_MASK << ARMV8_PMU_PMCR_N_SHIFT);
if (!kvm_supports_32bit_el0())
pmcr |= ARMV8_PMU_PMCR_LC;
--
Thanks,
Oliver
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-10-17 18:11 UTC|newest]
Thread overview: 120+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-09 23:08 [PATCH v7 00/12] KVM: arm64: PMU: Allow userspace to limit the number of PMCs on vCPU Raghavendra Rao Ananta
2023-10-09 23:08 ` Raghavendra Rao Ananta
2023-10-09 23:08 ` [PATCH v7 01/12] KVM: arm64: PMU: Introduce helpers to set the guest's PMU Raghavendra Rao Ananta
2023-10-09 23:08 ` Raghavendra Rao Ananta
2023-10-16 19:45 ` Eric Auger
2023-10-16 19:45 ` Eric Auger
2023-10-09 23:08 ` [PATCH v7 02/12] KVM: arm64: PMU: Set the default PMU for the guest before vCPU reset Raghavendra Rao Ananta
2023-10-09 23:08 ` Raghavendra Rao Ananta
2023-10-10 22:25 ` Oliver Upton
2023-10-10 22:25 ` Oliver Upton
2023-10-13 20:27 ` Raghavendra Rao Ananta
2023-10-13 20:27 ` Raghavendra Rao Ananta
2023-10-09 23:08 ` [PATCH v7 03/12] KVM: arm64: PMU: Clear PM{C,I}NTEN{SET,CLR} and PMOVS{SET,CLR} on " Raghavendra Rao Ananta
2023-10-09 23:08 ` Raghavendra Rao Ananta
2023-10-16 19:44 ` Eric Auger
2023-10-16 19:44 ` Eric Auger
2023-10-16 21:28 ` Raghavendra Rao Ananta
2023-10-16 21:28 ` Raghavendra Rao Ananta
2023-10-17 9:23 ` Eric Auger
2023-10-17 9:23 ` Eric Auger
2023-10-17 16:59 ` Raghavendra Rao Ananta
2023-10-17 16:59 ` Raghavendra Rao Ananta
2023-10-18 21:16 ` Raghavendra Rao Ananta
2023-10-18 21:16 ` Raghavendra Rao Ananta
2023-10-18 22:17 ` Oliver Upton
2023-10-18 22:17 ` Oliver Upton
2023-10-19 18:46 ` Raghavendra Rao Ananta
2023-10-19 18:46 ` Raghavendra Rao Ananta
2023-10-19 19:05 ` Oliver Upton
2023-10-19 19:05 ` Oliver Upton
2023-10-19 20:17 ` Raghavendra Rao Ananta
2023-10-19 20:17 ` Raghavendra Rao Ananta
2023-10-09 23:08 ` [PATCH v7 04/12] KVM: arm64: PMU: Don't define the sysreg reset() for PM{USERENR,CCFILTR}_EL0 Raghavendra Rao Ananta
2023-10-09 23:08 ` Raghavendra Rao Ananta
2023-10-16 19:47 ` Eric Auger
2023-10-16 19:47 ` Eric Auger
2023-10-09 23:08 ` [PATCH v7 05/12] KVM: arm64: PMU: Add a helper to read a vCPU's PMCR_EL0 Raghavendra Rao Ananta
2023-10-09 23:08 ` Raghavendra Rao Ananta
2023-10-16 20:02 ` Eric Auger
2023-10-16 20:02 ` Eric Auger
2023-10-09 23:08 ` [PATCH v7 06/12] KVM: arm64: PMU: Add a helper to read the number of counters Raghavendra Rao Ananta
2023-10-09 23:08 ` Raghavendra Rao Ananta
2023-10-10 22:30 ` Oliver Upton
2023-10-10 22:30 ` Oliver Upton
2023-10-13 5:43 ` Oliver Upton
2023-10-13 5:43 ` Oliver Upton
2023-10-13 20:24 ` Raghavendra Rao Ananta
2023-10-13 20:24 ` Raghavendra Rao Ananta
2023-10-09 23:08 ` [PATCH v7 07/12] KVM: arm64: PMU: Set PMCR_EL0.N for vCPU based on the associated PMU Raghavendra Rao Ananta
2023-10-09 23:08 ` Raghavendra Rao Ananta
2023-10-16 13:35 ` Sebastian Ott
2023-10-16 13:35 ` Sebastian Ott
2023-10-16 19:02 ` Raghavendra Rao Ananta
2023-10-16 19:02 ` Raghavendra Rao Ananta
2023-10-16 19:15 ` Oliver Upton
2023-10-16 19:15 ` Oliver Upton
2023-10-16 21:35 ` Raghavendra Rao Ananta
2023-10-16 21:35 ` Raghavendra Rao Ananta
2023-10-17 5:52 ` Oliver Upton
2023-10-17 5:52 ` Oliver Upton
2023-10-17 5:55 ` Oliver Upton
2023-10-17 5:55 ` Oliver Upton
2023-10-17 16:58 ` Raghavendra Rao Ananta
2023-10-17 16:58 ` Raghavendra Rao Ananta
2023-10-17 17:09 ` Oliver Upton
2023-10-17 17:09 ` Oliver Upton
2023-10-17 17:25 ` Raghavendra Rao Ananta
2023-10-17 17:25 ` Raghavendra Rao Ananta
2023-10-17 18:10 ` Oliver Upton [this message]
2023-10-17 18:10 ` Oliver Upton
2023-10-17 18:45 ` Raghavendra Rao Ananta
2023-10-17 18:45 ` Raghavendra Rao Ananta
2023-10-09 23:08 ` [PATCH v7 08/12] KVM: arm64: PMU: Allow userspace to limit PMCR_EL0.N for the guest Raghavendra Rao Ananta
2023-10-09 23:08 ` Raghavendra Rao Ananta
2023-10-17 15:52 ` Sebastian Ott
2023-10-17 15:52 ` Sebastian Ott
2023-10-17 16:49 ` Raghavendra Rao Ananta
2023-10-17 16:49 ` Raghavendra Rao Ananta
2023-10-19 10:45 ` Sebastian Ott
2023-10-19 10:45 ` Sebastian Ott
2023-10-19 18:05 ` Raghavendra Rao Ananta
2023-10-19 18:05 ` Raghavendra Rao Ananta
2023-10-09 23:08 ` [PATCH v7 09/12] tools: Import arm_pmuv3.h Raghavendra Rao Ananta
2023-10-09 23:08 ` Raghavendra Rao Ananta
2023-10-09 23:08 ` [PATCH v7 10/12] KVM: selftests: aarch64: Introduce vpmu_counter_access test Raghavendra Rao Ananta
2023-10-09 23:08 ` Raghavendra Rao Ananta
2023-10-12 11:24 ` Sebastian Ott
2023-10-12 11:24 ` Sebastian Ott
2023-10-12 15:01 ` Sebastian Ott
2023-10-12 15:01 ` Sebastian Ott
2023-10-13 21:05 ` Raghavendra Rao Ananta
2023-10-13 21:05 ` Raghavendra Rao Ananta
2023-10-16 10:01 ` Sebastian Ott
2023-10-16 10:01 ` Sebastian Ott
2023-10-16 18:56 ` Oliver Upton
2023-10-16 18:56 ` Oliver Upton
2023-10-16 19:05 ` Raghavendra Rao Ananta
2023-10-16 19:05 ` Raghavendra Rao Ananta
2023-10-16 19:07 ` Oliver Upton
2023-10-16 19:07 ` Oliver Upton
2023-10-17 14:51 ` Eric Auger
2023-10-17 14:51 ` Eric Auger
2023-10-17 17:07 ` Raghavendra Rao Ananta
2023-10-17 17:07 ` Raghavendra Rao Ananta
2023-10-17 15:48 ` Sebastian Ott
2023-10-17 15:48 ` Sebastian Ott
2023-10-17 17:10 ` Raghavendra Rao Ananta
2023-10-17 17:10 ` Raghavendra Rao Ananta
2023-10-09 23:08 ` [PATCH v7 11/12] KVM: selftests: aarch64: vPMU register test for implemented counters Raghavendra Rao Ananta
2023-10-09 23:08 ` Raghavendra Rao Ananta
2023-10-17 18:54 ` Eric Auger
2023-10-17 18:54 ` Eric Auger
2023-10-17 21:42 ` Raghavendra Rao Ananta
2023-10-17 21:42 ` Raghavendra Rao Ananta
2023-10-09 23:08 ` [PATCH v7 12/12] KVM: selftests: aarch64: vPMU register test for unimplemented counters Raghavendra Rao Ananta
2023-10-09 23:08 ` Raghavendra Rao Ananta
2023-10-18 6:54 ` Eric Auger
2023-10-18 6:54 ` Eric Auger
2023-10-19 18:09 ` Raghavendra Rao Ananta
2023-10-19 18:09 ` Raghavendra Rao Ananta
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ZS7OLRy6BwJljOV8@linux.dev \
--to=oliver.upton@linux.dev \
--cc=alexandru.elisei@arm.com \
--cc=coltonlewis@google.com \
--cc=james.morse@arm.com \
--cc=jingzhangos@google.com \
--cc=kvm@vger.kernel.org \
--cc=kvmarm@lists.linux.dev \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=maz@kernel.org \
--cc=pbonzini@redhat.com \
--cc=rananta@google.com \
--cc=reijiw@google.com \
--cc=sebott@redhat.com \
--cc=shahuang@redhat.com \
--cc=suzuki.poulose@arm.com \
--cc=yuzenghui@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.