From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from out-204.mta0.migadu.com (out-204.mta0.migadu.com [91.218.175.204]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9F62C2D793 for ; Tue, 17 Oct 2023 18:11:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="oPq/EYmf" Date: Tue, 17 Oct 2023 18:10:53 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1697566259; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Ble/vKiEcpM72A7rR+OClTCj96F4vXSttqGzdO7ZD1c=; b=oPq/EYmfHdlh036e6RWnrEtArG16BZIDe5PDwfwTVTKKB6ijtLpxWKk3qLhZ1if0XQdp2p g/cssnyCW7z4DRWItbStBeVDeOLuSNvAIskBgpNdOwK7tZp0/RGo4tTrLX/NQS/hhhEaH5 9WFFubE7ueM5bThbHHz39o5JCFcn0fA= X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. From: Oliver Upton To: Raghavendra Rao Ananta Cc: Sebastian Ott , Marc Zyngier , Alexandru Elisei , James Morse , Suzuki K Poulose , Paolo Bonzini , Zenghui Yu , Shaoqin Huang , Jing Zhang , Reiji Watanabe , Colton Lewis , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org, kvm@vger.kernel.org Subject: Re: [PATCH v7 07/12] KVM: arm64: PMU: Set PMCR_EL0.N for vCPU based on the associated PMU Message-ID: References: <20231009230858.3444834-1-rananta@google.com> <20231009230858.3444834-8-rananta@google.com> Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: X-Migadu-Flow: FLOW_OUT On Tue, Oct 17, 2023 at 10:25:50AM -0700, Raghavendra Rao Ananta wrote: > On Tue, Oct 17, 2023 at 10:09 AM Oliver Upton wrote: > > > > On Tue, Oct 17, 2023 at 09:58:08AM -0700, Raghavendra Rao Ananta wrote: > > > On Mon, Oct 16, 2023 at 10:52 PM Oliver Upton wrote: > > > > > > > > On Mon, Oct 16, 2023 at 02:35:52PM -0700, Raghavendra Rao Ananta wrote: > > > > > > > > [...] > > > > > > > > > > What's the point of doing this in the first place? The implementation of > > > > > > kvm_vcpu_read_pmcr() is populating PMCR_EL0.N using the VM-scoped value. > > > > > > > > > > > I guess originally the change replaced read_sysreg(pmcr_el0) with > > > > > kvm_vcpu_read_pmcr(vcpu) to maintain consistency with others. > > > > > But if you and Sebastian feel that it's an overkill and directly > > > > > getting the value via vcpu->kvm->arch.pmcr_n is more readable, I'm > > > > > happy to make the change. > > > > > > > > No, I'd rather you delete the line where PMCR_EL0.N altogether. > > > > reset_pmcr() tries to initialize the field, but your > > > > kvm_vcpu_read_pmcr() winds up replacing it with pmcr_n. > > > > > > > I didn't get this comment. We still do initialize pmcr, but using the > > > pmcr.n read via kvm_vcpu_read_pmcr() instead of the actual system > > > register. > > > > You have two bits of code trying to do the exact same thing: > > > > 1) reset_pmcr() initializes __vcpu_sys_reg(vcpu, PMCR_EL0) with the N > > field set up. > > > > 2) kvm_vcpu_read_pmcr() takes whatever is in __vcpu_sys_reg(vcpu, PMCR_EL0), > > *masks out* the N field and re-initializes it with vcpu->kvm->arch.pmcr_n > > > > Why do you need (1) if you do (2)? > > > Okay, I see what you mean now. In that case, let reset_pmcr(): > - Initialize 'pmcr' using vcpu->kvm->arch.pmcr_n > - Set ARMV8_PMU_PMCR_LC as appropriate in 'pmcr' > - Write 'pmcr' to the vcpu reg > > From here on out, kvm_vcpu_read_pmcr() would read off of this > initialized value, unless of course, userspace updates the pmcr.n. > Is this the flow that you were suggesting? Just squash this in: diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index d1db1f292645..7b54c7843bef 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -743,10 +743,8 @@ static u64 reset_pmselr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r) static u64 reset_pmcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r) { - u64 pmcr; + u64 pmcr = 0; - /* Only preserve PMCR_EL0.N, and reset the rest to 0 */ - pmcr = kvm_vcpu_read_pmcr(vcpu) & (ARMV8_PMU_PMCR_N_MASK << ARMV8_PMU_PMCR_N_SHIFT); if (!kvm_supports_32bit_el0()) pmcr |= ARMV8_PMU_PMCR_LC; -- Thanks, Oliver From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CFA9ACDB474 for ; Tue, 17 Oct 2023 18:11:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=D+/DcX40YyswoWbC1kCB7Ie51AuE+j/n85jzAmtdO5Q=; b=j6AeEBEP7hKMBU nH0cEbjIFrz6h12WCQ12BUlM9z+399YR0mxpI5xt7s5zHNfNtnO9zdlzn/Yh0ZouRiLX1OBcOBwe1 IWn99ZpekpUA9TYQt9GVC9P1QkWg2O9hveTCTeG24WKZTNVCKGb6b23NLAZNf43c5lxUa6IBNUZeh stdcAMvhZxtHJa9IdieXeAPFtFCsL0mbU2coyORuUFLxfJarbhqkK84er21OE7Rp3Nt9gy4+OAGol OzKi/STu3Dwu2hmUgOv1nTmsXaLbb2ySnBoSmewLehU40O/gcxip4hyV0uAECDX6NtVpTNeAJBZQv 1rq2MgA6RU/sQEymHyHQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qsoX9-00CxPx-2o; Tue, 17 Oct 2023 18:11:11 +0000 Received: from out-192.mta0.migadu.com ([91.218.175.192]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qsoX5-00CxOq-34 for linux-arm-kernel@lists.infradead.org; Tue, 17 Oct 2023 18:11:09 +0000 Date: Tue, 17 Oct 2023 18:10:53 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1697566259; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Ble/vKiEcpM72A7rR+OClTCj96F4vXSttqGzdO7ZD1c=; b=oPq/EYmfHdlh036e6RWnrEtArG16BZIDe5PDwfwTVTKKB6ijtLpxWKk3qLhZ1if0XQdp2p g/cssnyCW7z4DRWItbStBeVDeOLuSNvAIskBgpNdOwK7tZp0/RGo4tTrLX/NQS/hhhEaH5 9WFFubE7ueM5bThbHHz39o5JCFcn0fA= X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. From: Oliver Upton To: Raghavendra Rao Ananta Cc: Sebastian Ott , Marc Zyngier , Alexandru Elisei , James Morse , Suzuki K Poulose , Paolo Bonzini , Zenghui Yu , Shaoqin Huang , Jing Zhang , Reiji Watanabe , Colton Lewis , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org, kvm@vger.kernel.org Subject: Re: [PATCH v7 07/12] KVM: arm64: PMU: Set PMCR_EL0.N for vCPU based on the associated PMU Message-ID: References: <20231009230858.3444834-1-rananta@google.com> <20231009230858.3444834-8-rananta@google.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-Migadu-Flow: FLOW_OUT X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231017_111108_158411_6CADFD70 X-CRM114-Status: GOOD ( 25.89 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org T24gVHVlLCBPY3QgMTcsIDIwMjMgYXQgMTA6MjU6NTBBTSAtMDcwMCwgUmFnaGF2ZW5kcmEgUmFv IEFuYW50YSB3cm90ZToKPiBPbiBUdWUsIE9jdCAxNywgMjAyMyBhdCAxMDowOeKAr0FNIE9saXZl ciBVcHRvbiA8b2xpdmVyLnVwdG9uQGxpbnV4LmRldj4gd3JvdGU6Cj4gPgo+ID4gT24gVHVlLCBP Y3QgMTcsIDIwMjMgYXQgMDk6NTg6MDhBTSAtMDcwMCwgUmFnaGF2ZW5kcmEgUmFvIEFuYW50YSB3 cm90ZToKPiA+ID4gT24gTW9uLCBPY3QgMTYsIDIwMjMgYXQgMTA6NTLigK9QTSBPbGl2ZXIgVXB0 b24gPG9saXZlci51cHRvbkBsaW51eC5kZXY+IHdyb3RlOgo+ID4gPiA+Cj4gPiA+ID4gT24gTW9u LCBPY3QgMTYsIDIwMjMgYXQgMDI6MzU6NTJQTSAtMDcwMCwgUmFnaGF2ZW5kcmEgUmFvIEFuYW50 YSB3cm90ZToKPiA+ID4gPgo+ID4gPiA+IFsuLi5dCj4gPiA+ID4KPiA+ID4gPiA+ID4gV2hhdCdz IHRoZSBwb2ludCBvZiBkb2luZyB0aGlzIGluIHRoZSBmaXJzdCBwbGFjZT8gVGhlIGltcGxlbWVu dGF0aW9uIG9mCj4gPiA+ID4gPiA+IGt2bV92Y3B1X3JlYWRfcG1jcigpIGlzIHBvcHVsYXRpbmcg UE1DUl9FTDAuTiB1c2luZyB0aGUgVk0tc2NvcGVkIHZhbHVlLgo+ID4gPiA+ID4gPgo+ID4gPiA+ ID4gSSBndWVzcyBvcmlnaW5hbGx5IHRoZSBjaGFuZ2UgcmVwbGFjZWQgcmVhZF9zeXNyZWcocG1j cl9lbDApIHdpdGgKPiA+ID4gPiA+IGt2bV92Y3B1X3JlYWRfcG1jcih2Y3B1KSB0byBtYWludGFp biBjb25zaXN0ZW5jeSB3aXRoIG90aGVycy4KPiA+ID4gPiA+IEJ1dCBpZiB5b3UgYW5kIFNlYmFz dGlhbiBmZWVsIHRoYXQgaXQncyBhbiBvdmVya2lsbCBhbmQgZGlyZWN0bHkKPiA+ID4gPiA+IGdl dHRpbmcgdGhlIHZhbHVlIHZpYSB2Y3B1LT5rdm0tPmFyY2gucG1jcl9uIGlzIG1vcmUgcmVhZGFi bGUsIEknbQo+ID4gPiA+ID4gaGFwcHkgdG8gbWFrZSB0aGUgY2hhbmdlLgo+ID4gPiA+Cj4gPiA+ ID4gTm8sIEknZCByYXRoZXIgeW91IGRlbGV0ZSB0aGUgbGluZSB3aGVyZSBQTUNSX0VMMC5OIGFs dG9nZXRoZXIuCj4gPiA+ID4gcmVzZXRfcG1jcigpIHRyaWVzIHRvIGluaXRpYWxpemUgdGhlIGZp ZWxkLCBidXQgeW91cgo+ID4gPiA+IGt2bV92Y3B1X3JlYWRfcG1jcigpIHdpbmRzIHVwIHJlcGxh Y2luZyBpdCB3aXRoIHBtY3Jfbi4KPiA+ID4gPgo+ID4gPiBJIGRpZG4ndCBnZXQgdGhpcyBjb21t ZW50LiBXZSBzdGlsbCBkbyBpbml0aWFsaXplIHBtY3IsIGJ1dCB1c2luZyB0aGUKPiA+ID4gcG1j ci5uIHJlYWQgdmlhIGt2bV92Y3B1X3JlYWRfcG1jcigpIGluc3RlYWQgb2YgdGhlIGFjdHVhbCBz eXN0ZW0KPiA+ID4gcmVnaXN0ZXIuCj4gPgo+ID4gWW91IGhhdmUgdHdvIGJpdHMgb2YgY29kZSB0 cnlpbmcgdG8gZG8gdGhlIGV4YWN0IHNhbWUgdGhpbmc6Cj4gPgo+ID4gIDEpIHJlc2V0X3BtY3Io KSBpbml0aWFsaXplcyBfX3ZjcHVfc3lzX3JlZyh2Y3B1LCBQTUNSX0VMMCkgd2l0aCB0aGUgTgo+ ID4gICAgIGZpZWxkIHNldCB1cC4KPiA+Cj4gPiAgMikga3ZtX3ZjcHVfcmVhZF9wbWNyKCkgdGFr ZXMgd2hhdGV2ZXIgaXMgaW4gX192Y3B1X3N5c19yZWcodmNwdSwgUE1DUl9FTDApLAo+ID4gICAg ICptYXNrcyBvdXQqIHRoZSBOIGZpZWxkIGFuZCByZS1pbml0aWFsaXplcyBpdCB3aXRoIHZjcHUt Pmt2bS0+YXJjaC5wbWNyX24KPiA+Cj4gPiBXaHkgZG8geW91IG5lZWQgKDEpIGlmIHlvdSBkbyAo Mik/Cj4gPgo+IE9rYXksIEkgc2VlIHdoYXQgeW91IG1lYW4gbm93LiBJbiB0aGF0IGNhc2UsIGxl dCByZXNldF9wbWNyKCk6Cj4gLSBJbml0aWFsaXplICdwbWNyJyB1c2luZyAgdmNwdS0+a3ZtLT5h cmNoLnBtY3Jfbgo+IC0gU2V0IEFSTVY4X1BNVV9QTUNSX0xDIGFzIGFwcHJvcHJpYXRlIGluICdw bWNyJwo+IC0gV3JpdGUgJ3BtY3InIHRvIHRoZSB2Y3B1IHJlZwo+IAo+IEZyb20gaGVyZSBvbiBv dXQsIGt2bV92Y3B1X3JlYWRfcG1jcigpIHdvdWxkIHJlYWQgb2ZmIG9mIHRoaXMKPiBpbml0aWFs aXplZCB2YWx1ZSwgdW5sZXNzIG9mIGNvdXJzZSwgdXNlcnNwYWNlIHVwZGF0ZXMgdGhlIHBtY3Iu bi4KPiBJcyB0aGlzIHRoZSBmbG93IHRoYXQgeW91IHdlcmUgc3VnZ2VzdGluZz8KCkp1c3Qgc3F1 YXNoIHRoaXMgaW46CgpkaWZmIC0tZ2l0IGEvYXJjaC9hcm02NC9rdm0vc3lzX3JlZ3MuYyBiL2Fy Y2gvYXJtNjQva3ZtL3N5c19yZWdzLmMKaW5kZXggZDFkYjFmMjkyNjQ1Li43YjU0Yzc4NDNiZWYg MTAwNjQ0Ci0tLSBhL2FyY2gvYXJtNjQva3ZtL3N5c19yZWdzLmMKKysrIGIvYXJjaC9hcm02NC9r dm0vc3lzX3JlZ3MuYwpAQCAtNzQzLDEwICs3NDMsOCBAQCBzdGF0aWMgdTY0IHJlc2V0X3Btc2Vs cihzdHJ1Y3Qga3ZtX3ZjcHUgKnZjcHUsIGNvbnN0IHN0cnVjdCBzeXNfcmVnX2Rlc2MgKnIpCiAK IHN0YXRpYyB1NjQgcmVzZXRfcG1jcihzdHJ1Y3Qga3ZtX3ZjcHUgKnZjcHUsIGNvbnN0IHN0cnVj dCBzeXNfcmVnX2Rlc2MgKnIpCiB7Ci0JdTY0IHBtY3I7CisJdTY0IHBtY3IgPSAwOwogCi0JLyog T25seSBwcmVzZXJ2ZSBQTUNSX0VMMC5OLCBhbmQgcmVzZXQgdGhlIHJlc3QgdG8gMCAqLwotCXBt Y3IgPSBrdm1fdmNwdV9yZWFkX3BtY3IodmNwdSkgJiAoQVJNVjhfUE1VX1BNQ1JfTl9NQVNLIDw8 IEFSTVY4X1BNVV9QTUNSX05fU0hJRlQpOwogCWlmICgha3ZtX3N1cHBvcnRzXzMyYml0X2VsMCgp KQogCQlwbWNyIHw9IEFSTVY4X1BNVV9QTUNSX0xDOwogCgotLSAKVGhhbmtzLApPbGl2ZXIKCl9f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCmxpbnV4LWFybS1r ZXJuZWwgbWFpbGluZyBsaXN0CmxpbnV4LWFybS1rZXJuZWxAbGlzdHMuaW5mcmFkZWFkLm9yZwpo dHRwOi8vbGlzdHMuaW5mcmFkZWFkLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2xpbnV4LWFybS1rZXJu ZWwK