From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6A9B8CDB465 for ; Thu, 19 Oct 2023 16:35:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=fBx71x3BqkbALmnJjiHQeraC/JTHuUnFgEcluT4l+6k=; b=ewbYDn2SU7JBGL Tn4PlRFOPDeAQgfDcwdysQMH13t8gIlJHes4PP7Jiv0su5dirbCb3e6IgnwcF1mCCXS0tmNZsy+jm NGS9PkQ8OxhGSB4e929lwCq7lB6XBwGSyjDtfRR5JuV8TY0wX3KYhimLsO3j2fdsoclwmoQZX9pYS oPT+BGXCDg7FFgiNUMWRrN+NVzg+ELOgehNa5MA07AF9Aw63/wWYhazxaEPmVbLCSawsPMVkQH2Me KaLSngeygnsx+Uza+ffM36UYHBwX2xvpc8HdUfypacNWEbQWAGGD3k1i92FHXXi+XfEu058NWZySL sVHrHUeK0+MpytTh1SCA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qtVyu-000KVL-05; Thu, 19 Oct 2023 16:34:44 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qtVyq-000KUv-1u for linux-arm-kernel@lists.infradead.org; Thu, 19 Oct 2023 16:34:42 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id CFD1861A43; Thu, 19 Oct 2023 16:34:37 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id B9664C433C8; Thu, 19 Oct 2023 16:34:35 +0000 (UTC) Date: Thu, 19 Oct 2023 17:34:33 +0100 From: Catalin Marinas To: Ard Biesheuvel Cc: linux-arm-kernel@lists.infradead.org, Ard Biesheuvel , Will Deacon , Marc Zyngier , Mark Rutland , Ryan Roberts , Anshuman Khandual , Kees Cook , Joey Gouly Subject: Re: [PATCH v4 35/61] arm64: pgtable: Decouple PGDIR size macros from PGD/PUD/PMD levels Message-ID: References: <20230912141549.278777-63-ardb@google.com> <20230912141549.278777-98-ardb@google.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20230912141549.278777-98-ardb@google.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231019_093440_731431_F732F226 X-CRM114-Status: GOOD ( 27.58 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Sep 12, 2023 at 02:16:25PM +0000, Ard Biesheuvel wrote: > From: Ard Biesheuvel > > The mapping from PGD/PUD/PMD to levels and shifts is very confusing, > given that, due to folding, the shifts may be equal for different > levels, if the macros are even #define'd to begin with. > > In a subsequent patch, we will modify the ID mapping code to decouple > the number of levels from the kernel's view of how these types are > folded, so prepare for this by reformulating the macros without the use > of these types. > > Instead, use SWAPPER_BLOCK_SHIFT as the base quantity, and derive it > from either PAGE_SHIFT or PMD_SHIFT, which -if defined at all- are > defined unambiguously for a given page size, regardless of the number of > configured levels. > > Signed-off-by: Ard Biesheuvel > --- > arch/arm64/include/asm/kernel-pgtable.h | 65 ++++++-------------- > 1 file changed, 19 insertions(+), 46 deletions(-) > > diff --git a/arch/arm64/include/asm/kernel-pgtable.h b/arch/arm64/include/asm/kernel-pgtable.h > index 742a4b2778f7..5000f38ae0c6 100644 > --- a/arch/arm64/include/asm/kernel-pgtable.h > +++ b/arch/arm64/include/asm/kernel-pgtable.h > @@ -13,27 +13,22 @@ > #include > > /* > - * The linear mapping and the start of memory are both 2M aligned (per > - * the arm64 booting.txt requirements). Hence we can use section mapping > - * with 4K (section size = 2M) but not with 16K (section size = 32M) or > - * 64K (section size = 512M). > + * The physical and virtual addresses of the start of the kernel image are > + * equal modulo 2 MiB (per the arm64 booting.txt requirements). Hence we can > + * use section mapping with 4K (section size = 2M) but not with 16K (section > + * size = 32M) or 64K (section size = 512M). > */ > - > -/* > - * The idmap and swapper page tables need some space reserved in the kernel > - * image. Both require pgd, pud (4 levels only) and pmd tables to (section) > - * map the kernel. With the 64K page configuration, swapper and idmap need to > - * map to pte level. The swapper also maps the FDT (see __create_page_tables > - * for more information). Note that the number of ID map translation levels > - * could be increased on the fly if system RAM is out of reach for the default > - * VA range, so pages required to map highest possible PA are reserved in all > - * cases. > - */ > -#ifdef CONFIG_ARM64_4K_PAGES > -#define SWAPPER_PGTABLE_LEVELS (CONFIG_PGTABLE_LEVELS - 1) > +#if defined(PMD_SIZE) && PMD_SIZE <= MIN_KIMG_ALIGN Nitpick: we always have PMD_SIZE defined, either directly in the arm64 headers if we have more than 2 levels or included from the generic pgtable-nopmd.h. Otherwise the logic is fine. > +#define SWAPPER_BLOCK_SHIFT PMD_SHIFT > +#define SWAPPER_SKIP_LEVEL 1 > #else > -#define SWAPPER_PGTABLE_LEVELS (CONFIG_PGTABLE_LEVELS) > +#define SWAPPER_BLOCK_SHIFT PAGE_SHIFT > +#define SWAPPER_SKIP_LEVEL 0 > #endif > +#define SWAPPER_BLOCK_SIZE (UL(1) << SWAPPER_BLOCK_SHIFT) > +#define SWAPPER_TABLE_SHIFT (SWAPPER_BLOCK_SHIFT + PAGE_SHIFT - 3) > + > +#define SWAPPER_PGTABLE_LEVELS (CONFIG_PGTABLE_LEVELS - SWAPPER_SKIP_LEVEL) Do you use SWAPPER_SKIP_LEVEL anywhere else? If not we might as well define SWAPPER_PGTABLE_LEVELS directly under the #if/#else blocks. > #define IDMAP_VA_BITS 48 > #define IDMAP_LEVELS ARM64_HW_PGTABLE_LEVELS(IDMAP_VA_BITS) > @@ -53,24 +48,13 @@ > #define EARLY_ENTRIES(vstart, vend, shift, add) \ > (SPAN_NR_ENTRIES(vstart, vend, shift) + (add)) > > -#define EARLY_PGDS(vstart, vend, add) (EARLY_ENTRIES(vstart, vend, PGDIR_SHIFT, add)) > - > -#if SWAPPER_PGTABLE_LEVELS > 3 > -#define EARLY_PUDS(vstart, vend, add) (EARLY_ENTRIES(vstart, vend, PUD_SHIFT, add)) > -#else > -#define EARLY_PUDS(vstart, vend, add) (0) > -#endif > +#define EARLY_LEVEL(l, vstart, vend, add) \ > + (SWAPPER_PGTABLE_LEVELS > l ? EARLY_ENTRIES(vstart, vend, SWAPPER_BLOCK_SHIFT + l * (PAGE_SHIFT - 3), add) : 0) It took me a while to realise that this is 'l' and not '1' (I need better glasses). Maybe if you respin, change this to 'lvl'. -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel