From: "Roger Pau Monné" <roger.pau@citrix.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>, Wei Liu <wl@xen.org>,
xen-devel@lists.xenproject.org
Subject: Re: [PATCH v2] x86/i8259: do not assume interrupts always target CPU0
Date: Tue, 24 Oct 2023 13:36:13 +0200 [thread overview]
Message-ID: <ZTesLTIulycE1s5d@macbook> (raw)
In-Reply-To: <2c5a5b6f-5c67-e46c-765c-81999ac1e11b@suse.com>
On Tue, Oct 24, 2023 at 12:51:08PM +0200, Jan Beulich wrote:
> On 24.10.2023 12:14, Roger Pau Monné wrote:
> > On Tue, Oct 24, 2023 at 11:33:21AM +0200, Jan Beulich wrote:
> >> On 23.10.2023 14:46, Roger Pau Monne wrote:
> >>> --- a/xen/arch/x86/i8259.c
> >>> +++ b/xen/arch/x86/i8259.c
> >>> @@ -37,6 +37,15 @@ static bool _mask_and_ack_8259A_irq(unsigned int irq);
> >>>
> >>> bool bogus_8259A_irq(unsigned int irq)
> >>> {
> >>> + if ( smp_processor_id() &&
> >>> + !(boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) )
> >>> + /*
> >>> + * For AMD/Hygon do spurious PIC interrupt detection on all CPUs, as it
> >>> + * has been observed that during unknown circumstances spurious PIC
> >>> + * interrupts have been delivered to CPUs different than the BSP.
> >>> + */
> >>> + return false;
> >>> +
> >>> return !_mask_and_ack_8259A_irq(irq);
> >>> }
> >>
> >> I don't think this function should be changed; imo the adjustment belongs
> >> at the call site.
> >
> > It makes the call site much more complex to follow, in fact I was
> > considering pulling the PIC vector range checks into
> > bogus_8259A_irq(). Would that convince you into placing the check here
> > rather than in the caller context?
>
> Passing a vector and moving the range check into the function is something
> that may make sense. But I'm afraid the same does not apply to the
> smp_processor_id() check, unless the function was also renamed to
> bogus_8259A_vector(). Which in turn doesn't make much sense, to me at
> least, as the logic would better be in terms of IRQs (which is what the
> chip deals with primarily), not vectors (which the chip deals with solely
> during the INTA cycle with the CPU).
The alternative is to use:
if ( !(vector >= FIRST_LEGACY_VECTOR &&
vector <= LAST_LEGACY_VECTOR &&
(!smp_processor_id() ||
/*
* For AMD/Hygon do spurious PIC interrupt
* detection on all CPUs, as it has been observed
* that during unknown circumstances spurious PIC
* interrupts have been delivered to CPUs
* different than the BSP.
*/
(boot_cpu_data.x86_vendor & (X86_VENDOR_AMD |
X86_VENDOR_HYGON))) &&
bogus_8259A_irq(vector - FIRST_LEGACY_VECTOR)) )
{
Which I find too complex to read, and prone to mistakes by future
modifications.
What is your reasoning for wanting the smp_processor_id() check in
the caller rather than bogus_8259A_irq()? It does seem fine to me to
do such check in bogus_8259A_irq(), as whether the IRQ is bogus also
depends on whether it fired on the BSP or any of the APs.
Thanks, Roger.
next prev parent reply other threads:[~2023-10-24 11:36 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-23 12:46 [PATCH v2] x86/i8259: do not assume interrupts always target CPU0 Roger Pau Monne
2023-10-24 9:33 ` Jan Beulich
2023-10-24 10:14 ` Roger Pau Monné
2023-10-24 10:51 ` Jan Beulich
2023-10-24 11:36 ` Roger Pau Monné [this message]
2023-10-24 12:06 ` Jan Beulich
2023-10-24 12:08 ` Jan Beulich
2023-10-24 13:11 ` Roger Pau Monné
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