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From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Jonathan Cavitt <jonathan.cavitt@intel.com>
Cc: saurabhg.gupta@intel.com, lucas.demarchi@intel.com,
	intel-xe@lists.freedesktop.org
Subject: Re: [Intel-xe] [PATCH v2] drm/xe: clear the serviced bits on INTR_IDENTITY_REG
Date: Fri, 3 Nov 2023 16:14:50 -0400	[thread overview]
Message-ID: <ZUVUuiZHTDVKXRQ5@intel.com> (raw)
In-Reply-To: <20231103195338.912645-1-jonathan.cavitt@intel.com>

On Fri, Nov 03, 2023 at 12:53:38PM -0700, Jonathan Cavitt wrote:
> The spec for this register, like many other interrupt related ones,
> asks software to write back '1' to clear the serviced bits. Let's
> respect the spec.
> 
> v2:
> - Update commit message
> - Add missing CC
> 
> Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
> CC: Daniele Spurio Ceraolo <daniele.ceraolospurio@intel.com>
> CC: Lucas De Marchi <lucas.demarchi@intel.com>
> CC: Rodrigo Vivi <rodrigo.vivi@intel.com>
> CC: Paulo Zanoni <paulo.r.zanoni@intel.com>

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> ---
>  drivers/gpu/drm/xe/xe_irq.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_irq.c b/drivers/gpu/drm/xe/xe_irq.c
> index 61350ed32c61a..af3765c3fc0e2 100644
> --- a/drivers/gpu/drm/xe/xe_irq.c
> +++ b/drivers/gpu/drm/xe/xe_irq.c
> @@ -232,7 +232,7 @@ gt_engine_identity(struct xe_device *xe,
>  		return 0;
>  	}
>  
> -	xe_mmio_write32(mmio, INTR_IDENTITY_REG(bank), INTR_DATA_VALID);
> +	xe_mmio_write32(mmio, INTR_IDENTITY_REG(bank), ident);
>  
>  	return ident;
>  }
> -- 
> 2.25.1
> 

      parent reply	other threads:[~2023-11-03 20:15 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-03 19:53 [Intel-xe] [PATCH v2] drm/xe: clear the serviced bits on INTR_IDENTITY_REG Jonathan Cavitt
2023-11-03 20:07 ` [Intel-xe] ✗ CI.Patch_applied: failure for drm/xe: clear the serviced bits on INTR_IDENTITY_REG (rev2) Patchwork
2023-11-03 20:24   ` Rodrigo Vivi
2023-11-03 20:14 ` Rodrigo Vivi [this message]

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