From: Andi Shyti <andi.shyti@linux.intel.com>
To: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
Cc: intel-xe@lists.freedesktop.org
Subject: Re: [Intel-xe] [PATCH v2 2/3] drm/xe: Allow userspace to configure CCS mode
Date: Fri, 1 Dec 2023 21:57:49 +0100 [thread overview]
Message-ID: <ZWpIzR3ucjwkNRty@ashyti-mobl2.lan> (raw)
In-Reply-To: <20231129025716.9094-3-niranjana.vishwanathapura@intel.com>
Hi Niranjana,
> +static ssize_t
> +ccs_mode_show(struct device *kdev,
> + struct device_attribute *attr, char *buf)
> +{
> + struct xe_gt *gt = kobj_to_gt(&kdev->kobj);
> +
> + return sysfs_emit(buf, "Enabled compute engines %d; Number of compute slices %d\n",
> + gt->ccs_mode.num_engines, hweight32(CCS_MASK(gt)));
> +}
Please add separate interfaces called:
- compute_engines
- compute_slices
and each of them providing respecively
- gt->ccs_mode.num_engines
- hweight32(CCS_MASK(gt))
> +static ssize_t
> +ccs_mode_store(struct device *kdev, struct device_attribute *attr,
> + const char *buff, size_t count)
> +{
> + struct xe_gt *gt = kobj_to_gt(&kdev->kobj);
> + u32 num_engines, num_slices;
> + int ret;
> +
> + ret = kstrtou32(buff, 0, &num_engines);
> + if (ret)
> + return ret;
> +
> + /*
> + * Ensure number of engines specified is valid and there is an
> + * exact multiple of engines for slices.
> + */
> + num_slices = hweight32(CCS_MASK(gt));
> + if (!num_engines || num_engines > num_slices || num_slices % num_engines) {
> + xe_gt_dbg(gt, "Invalid compute config, %d engines %d slices\n",
> + num_engines, num_slices);
> + return -EINVAL;
> + }
> +
> + if (gt->ccs_mode.num_engines != num_engines) {
> + xe_gt_info(gt, "Setting compute mode to %d\n", num_engines);
> + gt->ccs_mode.num_engines = num_engines;
> + xe_gt_reset_async(gt);
> + }
> +
> + return count;
> +}
> +
> +static DEVICE_ATTR_RW(ccs_mode);
> +
> +static void xe_gt_ccs_mode_sysfs_fini(struct drm_device *drm, void *arg)
> +{
> + struct xe_gt *gt = arg;
> +
> + sysfs_remove_file(gt->sysfs, &dev_attr_ccs_mode.attr);
> +}
I think there's no need to remove sysfs files.
> +int xe_gt_ccs_mode_sysfs_init(struct xe_gt *gt)
> +{
> + struct xe_device *xe = gt_to_xe(gt);
> + int err;
> +
> + if (!xe_gt_ccs_mode_enabled(gt))
> + return 0;
> +
> + err = sysfs_create_file(gt->sysfs, &dev_attr_ccs_mode.attr);
> + if (err)
> + return err;
> +
> + err = drmm_add_action_or_reset(&xe->drm, xe_gt_ccs_mode_sysfs_fini, gt);
> + if (err)
> + drm_warn(&xe->drm, "%s: drmm_add_action_or_reset failed, err: %d\n",
> + __func__, err);
> +
> + return err;
Please, don't fail if sysfs fails. Make this function void.
Andi
next prev parent reply other threads:[~2023-12-01 20:57 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-29 2:57 [Intel-xe] [PATCH v2 0/3] drm/xe: Enable fixed CCS mode Niranjana Vishwanathapura
2023-11-29 2:57 ` [Intel-xe] [PATCH v2 1/3] drm/xe: Enable Fixed CCS mode setting Niranjana Vishwanathapura
2023-12-01 20:52 ` Andi Shyti
2023-12-02 6:05 ` Niranjana Vishwanathapura
2023-11-29 2:57 ` [Intel-xe] [PATCH v2 2/3] drm/xe: Allow userspace to configure CCS mode Niranjana Vishwanathapura
2023-12-01 20:57 ` Andi Shyti [this message]
2023-12-02 5:48 ` Niranjana Vishwanathapura
2023-11-29 2:57 ` [Intel-xe] [PATCH v2 3/3] drm/xe: Avoid any races around ccs_mode update Niranjana Vishwanathapura
2023-12-01 20:59 ` Andi Shyti
2023-12-02 2:37 ` Niranjana Vishwanathapura
2024-09-04 10:28 ` Simona Vetter
2023-11-29 4:50 ` [Intel-xe] ✓ CI.Patch_applied: success for drm/xe: Enable fixed CCS mode Patchwork
2023-11-29 4:51 ` [Intel-xe] ✗ CI.checkpatch: warning " Patchwork
2023-11-29 4:52 ` [Intel-xe] ✓ CI.KUnit: success " Patchwork
2023-11-29 4:59 ` [Intel-xe] ✓ CI.Build: " Patchwork
2023-11-29 4:59 ` [Intel-xe] ✓ CI.Hooks: " Patchwork
2023-11-29 5:01 ` [Intel-xe] ✓ CI.checksparse: " Patchwork
2023-11-29 5:34 ` [Intel-xe] ✓ CI.BAT: " Patchwork
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