From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5D7623D0AC; Thu, 7 Dec 2023 14:08:35 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4D40BC433C7; Thu, 7 Dec 2023 14:08:32 +0000 (UTC) Date: Thu, 7 Dec 2023 14:08:29 +0000 From: Catalin Marinas To: Joey Gouly Cc: linux-arm-kernel@lists.infradead.org, akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, dave.hansen@linux.intel.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: Re: [PATCH v3 07/25] arm64: enable the Permission Overlay Extension for EL0 Message-ID: References: <20231124163510.1835740-1-joey.gouly@arm.com> <20231124163510.1835740-8-joey.gouly@arm.com> Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20231124163510.1835740-8-joey.gouly@arm.com> On Fri, Nov 24, 2023 at 04:34:52PM +0000, Joey Gouly wrote: > +#ifdef CONFIG_ARM64_POE > +static void cpu_enable_poe(const struct arm64_cpu_capabilities *__unused) > +{ > + sysreg_clear_set(REG_TCR2_EL1, 0, TCR2_EL1x_E0POE); > + sysreg_clear_set(CPACR_EL1, 0, CPACR_ELx_E0POE); > +} > +#endif Don't we need the TCR2_EL1x.POE bit (for EL1) enabled as well? I'm thinking of the LDXR/STXR instructions accessing user memory (the futex code). -- Catalin From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 54DA3C4167B for ; Thu, 7 Dec 2023 14:09:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=0lZzeZna7ZL01ru+BwS2urfOKX1i3s1+z5TtKxIwwtk=; b=eBhHrdOMlBvEEK IX7R8hghdVl/4xhNmja0eCkOUSqeXutEfxyz/5e5TZXSq154otOizhbqocRQog3bsVi3WyQR/l+gF X6QkstTWw4G3/ikEKkUKZ4ISvkiwf3q3BkGmDULvilfBJsU6VRNUVihxeQbijrVf/sFxic7qn6vXH Tw/fwhGm1LQTecLiNqdGUSq6YZ8uugVFqoAIOrTOw0ev4bhKK+/+1DHp68HX1sOUu1Fa00yM2fBAZ JVyXd5wNJiuC0tdnmaxIhuCUjbaA6sjHntei71w2B3v2g0jjOQmY6/RcFT32QKGBkWtrYZfpGZPS4 DcG/WOcr/RUMste9hgOQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rBF3Q-00Cyoc-2Q; Thu, 07 Dec 2023 14:08:40 +0000 Received: from sin.source.kernel.org ([2604:1380:40e1:4800::1]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1rBF3O-00CynQ-0g for linux-arm-kernel@lists.infradead.org; Thu, 07 Dec 2023 14:08:39 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id 6BFEECE23DA; Thu, 7 Dec 2023 14:08:36 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4D40BC433C7; Thu, 7 Dec 2023 14:08:32 +0000 (UTC) Date: Thu, 7 Dec 2023 14:08:29 +0000 From: Catalin Marinas To: Joey Gouly Cc: linux-arm-kernel@lists.infradead.org, akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, dave.hansen@linux.intel.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: Re: [PATCH v3 07/25] arm64: enable the Permission Overlay Extension for EL0 Message-ID: References: <20231124163510.1835740-1-joey.gouly@arm.com> <20231124163510.1835740-8-joey.gouly@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20231124163510.1835740-8-joey.gouly@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231207_060838_426857_FB3432A8 X-CRM114-Status: UNSURE ( 7.97 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Nov 24, 2023 at 04:34:52PM +0000, Joey Gouly wrote: > +#ifdef CONFIG_ARM64_POE > +static void cpu_enable_poe(const struct arm64_cpu_capabilities *__unused) > +{ > + sysreg_clear_set(REG_TCR2_EL1, 0, TCR2_EL1x_E0POE); > + sysreg_clear_set(CPACR_EL1, 0, CPACR_ELx_E0POE); > +} > +#endif Don't we need the TCR2_EL1x.POE bit (for EL1) enabled as well? I'm thinking of the LDXR/STXR instructions accessing user memory (the futex code). -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel