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Date: Mon, 11 Dec 2023 15:26:05 +0100
From: Joerg Roedel <joro@8bytes.org>
To: Vasant Hegde <vasant.hegde@amd.com>
Cc: iommu@lists.linux.dev, suravee.suthikulpanit@amd.com, jgg@ziepe.ca
Subject: Re: [PATCH v2 0/9] Improve TLB invalidation logic
Message-ID: <ZXcb_coNiIqdLjzT@8bytes.org>
References: <20231122090215.6191-1-vasant.hegde@amd.com>
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In-Reply-To: <20231122090215.6191-1-vasant.hegde@amd.com>

On Wed, Nov 22, 2023 at 09:02:06AM +0000, Vasant Hegde wrote:
> Vasant Hegde (9):
>   iommu/amd: Rename iommu_flush_all_caches() -> amd_iommu_flush_all_caches()
>   iommu/amd: Remove redundant domain flush from attach_device()
>   iommu/amd: Remove redundant passing of PDE bit
>   iommu/amd: Add support to invalidate multiple guest pages
>   iommu/amd: Refactor IOMMU tlb invalidation code
>   iommu/amd: Refactor device iotlb invalidation code
>   iommu/amd: Consolidate amd_iommu_domain_flush_complete() call
>   iommu/amd: Make domain_flush_pages as global function
>   iommu/amd/pgtbl_v2: Invalidate updated page ranges only
> 
>  drivers/iommu/amd/amd_iommu.h       |   8 +-
>  drivers/iommu/amd/amd_iommu_types.h |   6 -
>  drivers/iommu/amd/init.c            |   8 +-
>  drivers/iommu/amd/io_pgtable.c      |   5 +-
>  drivers/iommu/amd/io_pgtable_v2.c   |  10 +-
>  drivers/iommu/amd/iommu.c           | 163 ++++++++++++----------------
>  6 files changed, 88 insertions(+), 112 deletions(-)

Applied, thanks.