From: Sean Christopherson <seanjc@google.com>
To: Tao Su <tao1.su@linux.intel.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
x86@kernel.org, kvm@vger.kernel.org,
linux-kernel@vger.kernel.org, Yi Lai <yi1.lai@intel.com>,
Xudong Hao <xudong.hao@intel.com>
Subject: Re: [PATCH] x86/cpu: Add a VMX flag to enumerate 5-level EPT support to userspace
Date: Wed, 10 Jan 2024 05:59:23 -0800 [thread overview]
Message-ID: <ZZ6iu5v_nAYtrz7K@google.com> (raw)
In-Reply-To: <ZZ3+8N3lUtmmwS0T@linux.bj.intel.com>
On Wed, Jan 10, 2024, Tao Su wrote:
> On Tue, Jan 09, 2024 at 04:23:40PM -0800, Sean Christopherson wrote:
> > Add a VMX flag in /proc/cpuinfo, ept_5level, so that userspace can query
> > whether or not the CPU supports 5-level EPT paging. EPT capabilities are
> > enumerated via MSR, i.e. aren't accessible to userspace without help from
> > the kernel, and knowing whether or not 5-level EPT is supported is sadly
> > necessary for userspace to correctly configure KVM VMs.
> >
> > When EPT is enabled, bits 51:49 of guest physical addresses are consumed
>
> nit: s/49/48
Argh, you even pointed that out before too. Thanks!
next prev parent reply other threads:[~2024-01-10 13:59 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-10 0:23 [PATCH] x86/cpu: Add a VMX flag to enumerate 5-level EPT support to userspace Sean Christopherson
2024-01-10 2:20 ` Tao Su
2024-01-10 13:59 ` Sean Christopherson [this message]
2024-01-10 6:16 ` Chao Gao
2024-01-10 16:26 ` Sean Christopherson
2024-01-11 2:52 ` Tao Su
2024-01-11 16:25 ` Sean Christopherson
2024-01-11 20:02 ` Paolo Bonzini
2024-01-11 21:12 ` Jim Mattson
2024-01-12 1:08 ` Tao Su
2024-01-11 10:13 ` Paolo Bonzini
2024-01-11 16:17 ` Sean Christopherson
2024-02-23 1:35 ` Sean Christopherson
2024-02-26 1:30 ` Xiaoyao Li
2024-02-26 7:11 ` Tao Su
2024-02-26 15:27 ` Sean Christopherson
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