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From: Pranjal Shrivastava <praan@google.com>
To: Nicolin Chen <nicolinc@nvidia.com>
Cc: Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>,
	"will@kernel.org" <will@kernel.org>,
	"robin.murphy@arm.com" <robin.murphy@arm.com>,
	"jgg@nvidia.com" <jgg@nvidia.com>,
	"joro@8bytes.org" <joro@8bytes.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"iommu@lists.linux.dev" <iommu@lists.linux.dev>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v1 1/4] iommu/arm-smmu-v3: Pass in vmid to arm_smmu_make_s2_domain_ste()
Date: Mon, 7 Apr 2025 08:37:14 +0000	[thread overview]
Message-ID: <Z_OOukRG0foehmV6@google.com> (raw)
In-Reply-To: <Z8iNfnZ9N5Lczxmq@Asurada-Nvidia>

On Wed, Mar 05, 2025 at 09:44:30AM -0800, Nicolin Chen wrote:
> On Wed, Mar 05, 2025 at 08:50:17AM +0000, Shameerali Kolothum Thodi wrote:
> > > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
> > > b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
> > > index bd9d7c85576a..e08c4ede4b2d 100644
> > > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
> > > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
> > > @@ -887,7 +887,7 @@ struct arm_smmu_entry_writer_ops {
> > >  void arm_smmu_make_abort_ste(struct arm_smmu_ste *target);
> > >  void arm_smmu_make_s2_domain_ste(struct arm_smmu_ste *target,
> > >  				 struct arm_smmu_master *master,
> > > -				 struct arm_smmu_domain *smmu_domain,
> > > +				 struct arm_smmu_domain *smmu_domain,
> > > u16 vmid,
> > >  				 bool ats_enabled);
> > 
> > Now that vmid is an input, do we need some kind of validation here as
> > at least vmid = 0 is reserved I guess for bypass STEs.
> 
> Perhaps it should do a WARN_ON_ONCE(!vmid), as it doesn't make
> sense for a caller to make an S2-bypass STE with this function.
> 

+1, a warning should suffice as the caller isn't expected to call this
with vmid = 0. For the s2 bypass case, we already set vmid field to 0 in
make_cdtable_ste for clients who *really* want the vmid = 0.

> Thanks
> Nicolin
> 

Thanks
Praan


  reply	other threads:[~2025-04-07  8:54 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-05  5:03 [PATCH v1 0/4] iommu/arm-smmu-v3: Allocate vmid per vsmmu instead of s2_parent Nicolin Chen
2025-03-05  5:04 ` [PATCH v1 1/4] iommu/arm-smmu-v3: Pass in vmid to arm_smmu_make_s2_domain_ste() Nicolin Chen
2025-03-05  8:50   ` Shameerali Kolothum Thodi
2025-03-05 17:44     ` Nicolin Chen
2025-04-07  8:37       ` Pranjal Shrivastava [this message]
2025-03-05 16:55   ` Jason Gunthorpe
2025-04-07  8:32   ` Pranjal Shrivastava
2025-03-05  5:04 ` [PATCH v1 2/4] iommu/arm-smmu-v3: Share arm_smmu_cmdq_issue_cmd_with_sync() with vsmmu Nicolin Chen
2025-04-07  8:43   ` Pranjal Shrivastava
2025-03-05  5:04 ` [PATCH v1 3/4] iommu/arm-smmu-v3: Decouple vmid from S2 nest_parent domain Nicolin Chen
2025-03-05 17:01   ` Jason Gunthorpe
2025-03-05 18:45     ` Nicolin Chen
2025-04-07 10:51   ` Pranjal Shrivastava
2025-04-07 16:52     ` Jason Gunthorpe
2025-04-08 14:20       ` Pranjal Shrivastava
2025-04-15  0:05     ` Nicolin Chen
2025-03-05  5:04 ` [PATCH v1 4/4] iommu/arm-smmu-v3-iommufd: Allow a shared s2_parent to allocate vSMMU Nicolin Chen
2025-03-05  9:01   ` Shameerali Kolothum Thodi
2025-03-05 16:57     ` Jason Gunthorpe
2025-03-05 17:49       ` Nicolin Chen
2025-03-05 16:54 ` [PATCH v1 0/4] iommu/arm-smmu-v3: Allocate vmid per vsmmu instead of s2_parent Jason Gunthorpe
2025-03-05 18:23   ` Nicolin Chen
2025-03-05 18:31     ` Jason Gunthorpe
2025-03-05 18:51       ` Nicolin Chen
2025-03-05 19:29         ` Jason Gunthorpe
2025-03-05 19:46           ` Nicolin Chen

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