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AJvYcCW0NwgBoIxdMTakFILypwxBEWblqW7VzoklS3MqjnQeAaNIZnSyUgkEn4odIbCJotdzini+RG0=@lists.linux.dev X-Gm-Message-State: AOJu0YwcrLFIJuZowxxyQvL+0jGoIPHZxvS7/ziTE+dSyW5UjVFybBiL KPrhclJ08uaIKus3eXSBKlRRvFTVBm+/GFRABOEpBqdowezm/n334eSCABiD26+jJrocBMeWiJ/ 7VQ== X-Google-Smtp-Source: AGHT+IHFT5IWpb0wEWYBsgf38l3iAGlVDr2qHVuyYE70TQA84d8Gl7Htq0vtNTpBGTTuOvXXCqA42VAV2Ds= X-Received: from pfbhg1.prod.google.com ([2002:a05:6a00:8601:b0:736:3d80:706e]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a17:903:3bc8:b0:223:5124:a16e with SMTP id d9443c01a7336-22a8a048ffamr208407455ad.5.1744039210859; Mon, 07 Apr 2025 08:20:10 -0700 (PDT) Date: Mon, 7 Apr 2025 08:20:09 -0700 In-Reply-To: <20250331145643.GF10839@nvidia.com> Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20250319192246.GQ9311@nvidia.com> <86y0wrlrxt.wl-maz@kernel.org> <86wmcbllg2.wl-maz@kernel.org> <20250331145643.GF10839@nvidia.com> Message-ID: Subject: Re: [PATCH v3 1/1] KVM: arm64: Allow cacheable stage 2 mapping using VMA flags From: Sean Christopherson To: Jason Gunthorpe Cc: Marc Zyngier , Ankit Agrawal , Catalin Marinas , Oliver Upton , "joey.gouly@arm.com" , "suzuki.poulose@arm.com" , "yuzenghui@huawei.com" , "will@kernel.org" , "ryan.roberts@arm.com" , "shahuang@redhat.com" , "lpieralisi@kernel.org" , "david@redhat.com" , Aniket Agashe , Neo Jia , Kirti Wankhede , "Tarun Gupta (SW-GPU)" , Vikram Sethi , Andy Currid , Alistair Popple , John Hubbard , Dan Williams , Zhi Wang , Matt Ochs , Uday Dhoke , Dheeraj Nigam , Krishnakant Jaju , "alex.williamson@redhat.com" , "sebastianene@google.com" , "coltonlewis@google.com" , "kevin.tian@intel.com" , "yi.l.liu@intel.com" , "ardb@kernel.org" , "akpm@linux-foundation.org" , "gshan@redhat.com" , "linux-mm@kvack.org" , "ddutile@redhat.com" , "tabba@google.com" , "qperret@google.com" , "kvmarm@lists.linux.dev" , "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" Content-Type: text/plain; charset="us-ascii" On Mon, Mar 31, 2025, Jason Gunthorpe wrote: > On Wed, Mar 26, 2025 at 11:24:32AM -0700, Sean Christopherson wrote: > > > I don't know how you reconcile the lack of host mapping and cache > > > maintenance. The latter cannot take place without the former. > > > > I assume cache maintenance only requires _a_ mapping to the physical memory. > > With guest_memfd, KVM has the pfn (which happens to always be struct page memory > > today), and so can establish a VA=>PA mapping as needed. > > This is why we are forcing FWB in this work, because we don't have a > VA mapping and KVM doesn't have the code to create one on demand. I don't follow. As it exists today, guest_memfd doesn't touch the direct map, i.e. there's already a kernel mapping, KVM doesn't need to create one.