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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v1 0/8] Enable/Disable DC balance along with VRR DSB
Date: Wed, 16 Apr 2025 18:07:00 +0300	[thread overview]
Message-ID: <Z__HlFEmNYauSX2u@intel.com> (raw)
In-Reply-To: <20250416062737.1766703-1-mitulkumar.ajitkumar.golani@intel.com>

On Wed, Apr 16, 2025 at 11:57:29AM +0530, Mitul Golani wrote:
> Control DC Balance Adjustment bit to accomodate changes along
> with VRR DSB implementation.
> 
> Mitul Golani (8):
>   drm/i915/vrr: Add DC balance registers
>   drm/i915/dmc: Add pipe DMC DC balance registers
>   drm/i915/vrr: Refactor vmin/vmax stuff
>   drm/i915/vrr: Add functions to read out vmin/vmax stuff
>   drm/i915: Extract vrr_vblank_start()
>   drm/i915/vrr: Implement vblank evasion with DC balancing
>   drm/i915/dsb: Add pipedmc dc balance enable/disable
>   drm/i915/vrr: Pause DC balancing for DSB commits

Looks like you've messed up the authorship of most of these.

> 
>  drivers/gpu/drm/i915/display/intel_display.c  |  13 ++
>  .../drm/i915/display/intel_display_types.h    |   2 +-
>  drivers/gpu/drm/i915/display/intel_dmc.c      |  16 ++
>  drivers/gpu/drm/i915/display/intel_dmc.h      |   5 +
>  drivers/gpu/drm/i915/display/intel_dmc_regs.h |  37 +++++
>  drivers/gpu/drm/i915/display/intel_dsb.c      |  31 +++-
>  drivers/gpu/drm/i915/display/intel_vblank.c   |  33 ++++-
>  drivers/gpu/drm/i915/display/intel_vrr.c      | 138 +++++++++++++-----
>  drivers/gpu/drm/i915/display/intel_vrr.h      |   5 +
>  drivers/gpu/drm/i915/display/intel_vrr_regs.h |  43 ++++++
>  10 files changed, 284 insertions(+), 39 deletions(-)
> 
> -- 
> 2.48.1

-- 
Ville Syrjälä
Intel

  parent reply	other threads:[~2025-04-16 15:07 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-16  6:27 [PATCH v1 0/8] Enable/Disable DC balance along with VRR DSB Mitul Golani
2025-04-16  6:27 ` [PATCH v1 1/8] drm/i915/vrr: Add DC balance registers Mitul Golani
2025-04-16  8:29   ` Jani Nikula
2025-04-16  6:27 ` [PATCH v1 2/8] drm/i915/dmc: Add pipe DMC " Mitul Golani
2025-04-16  6:27 ` [PATCH v1 3/8] drm/i915/vrr: Refactor vmin/vmax stuff Mitul Golani
2025-04-16  6:27 ` [PATCH v1 4/8] drm/i915/vrr: Add functions to read out " Mitul Golani
2025-04-16  6:27 ` [PATCH v1 5/8] drm/i915: Extract vrr_vblank_start() Mitul Golani
2025-04-16  6:27 ` [PATCH v1 6/8] drm/i915/vrr: Implement vblank evasion with DC balancing Mitul Golani
2025-04-16  6:27 ` [PATCH v1 7/8] drm/i915/dsb: Add pipedmc dc balance enable/disable Mitul Golani
2025-04-16  6:27 ` [PATCH v1 8/8] drm/i915/vrr: Pause DC balancing for DSB commits Mitul Golani
2025-04-16  7:33 ` ✗ Fi.CI.CHECKPATCH: warning for Enable/Disable DC balance along with VRR DSB Patchwork
2025-04-16 13:23 ` ✗ i915.CI.BAT: failure " Patchwork
2025-04-16 15:07 ` Ville Syrjälä [this message]
2025-04-16 15:12   ` [PATCH v1 0/8] " Ville Syrjälä
2025-04-17  5:53     ` Golani, Mitulkumar Ajitkumar

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