From: "Roger Pau Monné" <roger.pau@citrix.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>, Wei Liu <wl@xen.org>,
xen-devel@lists.xenproject.org
Subject: Re: [PATCH v2] x86/intel: ensure Global Performance Counter Control is setup correctly
Date: Fri, 12 Jan 2024 11:08:51 +0100 [thread overview]
Message-ID: <ZaEPs5Y0SUgcOb3c@macbook> (raw)
In-Reply-To: <b2412d90-e368-405f-813f-20a95f99ff21@suse.com>
On Fri, Jan 12, 2024 at 08:42:27AM +0100, Jan Beulich wrote:
> On 11.01.2024 17:53, Roger Pau Monné wrote:
> > On Thu, Jan 11, 2024 at 04:52:04PM +0100, Jan Beulich wrote:
> >> On 11.01.2024 15:15, Roger Pau Monné wrote:
> >>> On Thu, Jan 11, 2024 at 03:01:01PM +0100, Jan Beulich wrote:
> >>>> On 11.01.2024 13:22, Roger Pau Monné wrote:
> >>>>> Oh, indeed, can adjust on this same patch if that's OK (seeing as the
> >>>>> issue was already there previous to my change).
> >>>>
> >>>> Well, I'm getting the impression that it was deliberate there, i.e. set
> >>>> setting of the feature flag may want to remain thus constrained.
> >>>
> >>> Hm, I find it weird, but the original commit message doesn't help at
> >>> all. Xen itself only uses PMC0, and I don't find any other
> >>> justification in the current code to require at least 2 counters in
> >>> order to expose arch performance monitoring to be present.
> >>>
> >>> Looking at the SDM vol3, the figures there only contain PMC0 and PMC1,
> >>> so someone only reading that manual might assume there must always be
> >>> 2 global PMCs?
> >>
> >> That may have been the impression at the time. It may have been wrong
> >> already back then, or ...
> >>
> >>> (vol4 clarifies the that the number of global PMCs is variable).
> >>
> >> ... it may have been clarified in the SDM later on. My vague guess is
> >> that the > 1 check was to skip what may have been "obviously buggy"
> >> back at the time.
> >
> > Let me know if you are OK with the adjustment in v3, or whether you
> > would rather leave the > 1 check as-is (or maybe adjust in a different
> > patch).
>
> Well, I haven't been able to make up my mind as to whether the original
> check was wrong. Without clear indication, I think we should retain the
> original behavior by having the __set_bit() gated by an additional if().
> Then, since the line needs touching anyway, a further question would be
> whether to properly switch to setup_force_cpu_cap() at the same time.
Having looked at Linux, it has exactly the same check for > 1, which I
guess is to be expected since the code in Xen is quite likely adapted
from the code in Linux.
Overall, it might be best to leave the check as > 1. It's possible (as
I think you also mention in a previous email) that there's simply no
hardware with 1 counter. This might no longer be true when
virtualized, but given the current checks in both Xen and Linux any
virtualization environment that attempts to expose arch perf support
would need to expose at least 2 PMCs.
My suggestion is to leave the cnt > 1 check as it is in v2.
I can send a v4 with that check fixed if there's nothing else in v3
that needs fixing.
IMO doing the adjustment to PERF_GLOBAL_CTRL without setting
ARCH_PERFMON would be contradictory. Either we set ARCH_PERFMON
support and consequently adjust PERF_GLOBAL_CTRL, or we don't.
Thanks, Roger.
next prev parent reply other threads:[~2024-01-12 10:09 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-11 9:08 [PATCH v2] x86/intel: ensure Global Performance Counter Control is setup correctly Roger Pau Monne
2024-01-11 10:00 ` Jan Beulich
2024-01-11 10:32 ` Roger Pau Monné
2024-01-11 10:38 ` Jan Beulich
2024-01-11 10:11 ` Jan Beulich
2024-01-11 10:40 ` Roger Pau Monné
2024-01-11 11:34 ` Jan Beulich
2024-01-11 12:22 ` Roger Pau Monné
2024-01-11 14:01 ` Jan Beulich
2024-01-11 14:15 ` Roger Pau Monné
2024-01-11 15:52 ` Jan Beulich
2024-01-11 16:53 ` Roger Pau Monné
2024-01-12 7:42 ` Jan Beulich
2024-01-12 10:08 ` Roger Pau Monné [this message]
2024-01-12 10:19 ` Jan Beulich
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ZaEPs5Y0SUgcOb3c@macbook \
--to=roger.pau@citrix.com \
--cc=andrew.cooper3@citrix.com \
--cc=jbeulich@suse.com \
--cc=wl@xen.org \
--cc=xen-devel@lists.xenproject.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.