From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D9BCA679E4; Tue, 30 Jan 2024 11:52:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706615552; cv=none; b=twrCa2Woe02fqTrpcNeEAore2k6/mAWhbGp8bs/e0o7CqcKMKgQeFJdUM3SkeW5WpSArhUHYiAMPTYBQOQONN8Vx5CaQDefXxahoKksPo39hxexemYpYcOPanot8xZfNVH+H2Xx+ewVw9J319iCt67Mwad2424cdgDIXUIN9ZwI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706615552; c=relaxed/simple; bh=DMspNHe+PyuwZG/IydiW/Wdtvh3uR5JF2oe/i9uuk5Y=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=Q6veGF+Xb+q5G1IsBvw+qQndDBnTwhcIcQSBAKBAZkKar9JeyAo+YWe9guO+dvxSLwEbWelE3UlBiC4ewSn6ec7B55ncQ8Da9JPZGNdgvWzsJvfGJXo8RHMUS89RhGHTGMxc4n9Qz5x62tBAVpwzPhLBdSMd+Sr6HROk5v8Rrk4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=tLd3MiRr; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="tLd3MiRr" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5BD77C433F1; Tue, 30 Jan 2024 11:52:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1706615551; bh=DMspNHe+PyuwZG/IydiW/Wdtvh3uR5JF2oe/i9uuk5Y=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=tLd3MiRrPCcMgjVjHBWZko6Az5rZSFR1TS04dBkF6SIlhgzavZ2stqYFKUjlYdcgz CUm7cZDSLxFrXzePWm05avfoOHKiqK3DWlv/ZpMl4Fbk24sTIvCe9Ad7MmJZ7Huvvi JK1VLQEXMckAltshWu+H0x/ncIpjIlmb5TTFb6OVzHS8xm9VPhnBxdPSJwFZ7kx29b O4hDrkrHy1F2o3o8FdBROYbPGiljw4vd+CDssP8WvjexD/SSs6VTTDk/bMsGGQ/WhM +yAfrdEE4Gke6UPP5de/5dsmvbanSxCQT9o+813w0EqxCvGItuM9kUDGYXnlZQog6a j5Pwxm/sKwtkg== Date: Tue, 30 Jan 2024 19:39:35 +0800 From: Jisheng Zhang To: Petr =?utf-8?B?VGVzYcWZw61r?= Cc: Alexandre Torgue , Jose Abreu , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , "open list:STMMAC ETHERNET DRIVER" , "moderated list:ARM/STM32 ARCHITECTURE" , "moderated list:ARM/STM32 ARCHITECTURE" , open list , "open list:ARM/Allwinner sunXi SoC support" , Marc Haber , Andrew Lunn , Florian Fainelli , stable@vger.kernel.org Subject: Re: [PATCH net v2] net: stmmac: protect updates of 64-bit statistics counters Message-ID: References: <20240128193529.24677-1-petr@tesarici.cz> <20240130083539.4ea26a8d@meshulam.tesarici.cz> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20240130083539.4ea26a8d@meshulam.tesarici.cz> On Tue, Jan 30, 2024 at 08:35:39AM +0100, Petr Tesařík wrote: > On Tue, 30 Jan 2024 13:00:10 +0800 > Jisheng Zhang wrote: > > > On Sun, Jan 28, 2024 at 08:35:29PM +0100, Petr Tesarik wrote: > > > As explained by a comment in , write side of struct > > > u64_stats_sync must ensure mutual exclusion, or one seqcount update could > > > be lost on 32-bit platforms, thus blocking readers forever. Such lockups > > > have been observed in real world after stmmac_xmit() on one CPU raced with > > > stmmac_napi_poll_tx() on another CPU. > > > > > > To fix the issue without introducing a new lock, split the statics into > > > three parts: > > > > > > 1. fields updated only under the tx queue lock, > > > 2. fields updated only during NAPI poll, > > > 3. fields updated only from interrupt context, > > > > > > Updates to fields in the first two groups are already serialized through > > > other locks. It is sufficient to split the existing struct u64_stats_sync > > > so that each group has its own. > > > > > > Note that tx_set_ic_bit is updated from both contexts. Split this counter > > > so that each context gets its own, and calculate their sum to get the total > > > value in stmmac_get_ethtool_stats(). > > > > > > For the third group, multiple interrupts may be processed by different CPUs > > > at the same time, but interrupts on the same CPU will not nest. Move fields > > > from this group to a newly created per-cpu struct stmmac_pcpu_stats. > > > > > > Fixes: 133466c3bbe1 ("net: stmmac: use per-queue 64 bit statistics where necessary") > > > Link: https://lore.kernel.org/netdev/Za173PhviYg-1qIn@torres.zugschlus.de/t/ > > > Cc: stable@vger.kernel.org > > > Signed-off-by: Petr Tesarik > > > > Thanks for the fix patch. One trivial improviement below > > s/netdev_alloc_pcpu_stats/devm_netdev_alloc_pcpu_stats to simplify > > error and exit code path. > > Thanks for your review. > > In fact, many other allocations in stmmac could be converted to devm_*. > I wanted to stay consistent with the existing code, but hey, you're there's already devm_* usage in stmmac_dvr_probe(), eg. devm_alloc_etherdev_mqs I believe other parts are from the old days when there's no devm_* APIs > right there's no good reason for it. > > Plus, I can send convert the other places with another patch. > > > With that: > > Reviewed-by: Jisheng Zhang > > > > PS: when I sent the above "net: stmmac: use per-queue 64 bit statistics > > where necessary", I had an impression: there are too much statistics in > > stmmac driver, I didn't see so many statistics in other eth drivers, is > > it possible to remove some useless or not that useful statistic members? > > I don't feel authorized to make the decision. But I also wonder about > some counters. For example, why is there tx_packets and tx_pkt_n? The > former is shown as RX packets by "ip stats show dev end0", the latter > is shown by as tx_pkt_n by "ethtools -S end0". The values do differ, > but I have no clue why, and if they are even expected to be different > or if it's a bug. > > Petr T From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3DF7BC46CD2 for ; Tue, 30 Jan 2024 11:52:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=qPFCesL6HriRN5iLUCuWnplkWBwkhDxi9RRn0Ju6tKA=; b=dRf9Q8JeVJRo5x +KGcfUaVR15SptLLM/ZfrD0c3XVVPx/XEmMXG2e71x1QXCUFKFKzrauzGW+CXI7kZIHpnMRbJC3kw bAQ0ZR40by+DzVdeNx7oC3rSjsgq/BkrOwSIZ/nL8zGjMPZ0UxNKvrx871Ql2NLC/Xc1J2MfoKvjt pNwa2FhtUfJsmU9uK0EWGy55RGDPv+5Tx7pNA9iLu7aj5jMioYrw4uwzIO03vHkuqoroyIRww5LGE Cx5CpIZeV7SI2eSGr4Pei4ptB0QFvv7g0FB9pdxEIyVwnnvwBzKgeSRTHyEtYJIhoqGPDUTjieGme xdvq3oogprfMek6uqlaQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rUmfK-0000000GZ4r-2X8h; Tue, 30 Jan 2024 11:52:34 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rUmfI-0000000GZ4P-1LAU for linux-arm-kernel@lists.infradead.org; Tue, 30 Jan 2024 11:52:33 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id BAD04601BD; Tue, 30 Jan 2024 11:52:31 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5BD77C433F1; Tue, 30 Jan 2024 11:52:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1706615551; bh=DMspNHe+PyuwZG/IydiW/Wdtvh3uR5JF2oe/i9uuk5Y=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=tLd3MiRrPCcMgjVjHBWZko6Az5rZSFR1TS04dBkF6SIlhgzavZ2stqYFKUjlYdcgz CUm7cZDSLxFrXzePWm05avfoOHKiqK3DWlv/ZpMl4Fbk24sTIvCe9Ad7MmJZ7Huvvi JK1VLQEXMckAltshWu+H0x/ncIpjIlmb5TTFb6OVzHS8xm9VPhnBxdPSJwFZ7kx29b O4hDrkrHy1F2o3o8FdBROYbPGiljw4vd+CDssP8WvjexD/SSs6VTTDk/bMsGGQ/WhM +yAfrdEE4Gke6UPP5de/5dsmvbanSxCQT9o+813w0EqxCvGItuM9kUDGYXnlZQog6a j5Pwxm/sKwtkg== Date: Tue, 30 Jan 2024 19:39:35 +0800 From: Jisheng Zhang To: Petr =?utf-8?B?VGVzYcWZw61r?= Cc: Alexandre Torgue , Jose Abreu , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , "open list:STMMAC ETHERNET DRIVER" , "moderated list:ARM/STM32 ARCHITECTURE" , "moderated list:ARM/STM32 ARCHITECTURE" , open list , "open list:ARM/Allwinner sunXi SoC support" , Marc Haber , Andrew Lunn , Florian Fainelli , stable@vger.kernel.org Subject: Re: [PATCH net v2] net: stmmac: protect updates of 64-bit statistics counters Message-ID: References: <20240128193529.24677-1-petr@tesarici.cz> <20240130083539.4ea26a8d@meshulam.tesarici.cz> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20240130083539.4ea26a8d@meshulam.tesarici.cz> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240130_035232_458882_4410A3F2 X-CRM114-Status: GOOD ( 35.07 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org T24gVHVlLCBKYW4gMzAsIDIwMjQgYXQgMDg6MzU6MzlBTSArMDEwMCwgUGV0ciBUZXNhxZnDrWsg d3JvdGU6Cj4gT24gVHVlLCAzMCBKYW4gMjAyNCAxMzowMDoxMCArMDgwMAo+IEppc2hlbmcgWmhh bmcgPGpzemhhbmdAa2VybmVsLm9yZz4gd3JvdGU6Cj4gCj4gPiBPbiBTdW4sIEphbiAyOCwgMjAy NCBhdCAwODozNToyOVBNICswMTAwLCBQZXRyIFRlc2FyaWsgd3JvdGU6Cj4gPiA+IEFzIGV4cGxh aW5lZCBieSBhIGNvbW1lbnQgaW4gPGxpbnV4L3U2NF9zdGF0c19zeW5jLmg+LCB3cml0ZSBzaWRl IG9mIHN0cnVjdAo+ID4gPiB1NjRfc3RhdHNfc3luYyBtdXN0IGVuc3VyZSBtdXR1YWwgZXhjbHVz aW9uLCBvciBvbmUgc2VxY291bnQgdXBkYXRlIGNvdWxkCj4gPiA+IGJlIGxvc3Qgb24gMzItYml0 IHBsYXRmb3JtcywgdGh1cyBibG9ja2luZyByZWFkZXJzIGZvcmV2ZXIuIFN1Y2ggbG9ja3Vwcwo+ ID4gPiBoYXZlIGJlZW4gb2JzZXJ2ZWQgaW4gcmVhbCB3b3JsZCBhZnRlciBzdG1tYWNfeG1pdCgp IG9uIG9uZSBDUFUgcmFjZWQgd2l0aAo+ID4gPiBzdG1tYWNfbmFwaV9wb2xsX3R4KCkgb24gYW5v dGhlciBDUFUuCj4gPiA+IAo+ID4gPiBUbyBmaXggdGhlIGlzc3VlIHdpdGhvdXQgaW50cm9kdWNp bmcgYSBuZXcgbG9jaywgc3BsaXQgdGhlIHN0YXRpY3MgaW50bwo+ID4gPiB0aHJlZSBwYXJ0czoK PiA+ID4gCj4gPiA+IDEuIGZpZWxkcyB1cGRhdGVkIG9ubHkgdW5kZXIgdGhlIHR4IHF1ZXVlIGxv Y2ssCj4gPiA+IDIuIGZpZWxkcyB1cGRhdGVkIG9ubHkgZHVyaW5nIE5BUEkgcG9sbCwKPiA+ID4g My4gZmllbGRzIHVwZGF0ZWQgb25seSBmcm9tIGludGVycnVwdCBjb250ZXh0LAo+ID4gPiAKPiA+ ID4gVXBkYXRlcyB0byBmaWVsZHMgaW4gdGhlIGZpcnN0IHR3byBncm91cHMgYXJlIGFscmVhZHkg c2VyaWFsaXplZCB0aHJvdWdoCj4gPiA+IG90aGVyIGxvY2tzLiBJdCBpcyBzdWZmaWNpZW50IHRv IHNwbGl0IHRoZSBleGlzdGluZyBzdHJ1Y3QgdTY0X3N0YXRzX3N5bmMKPiA+ID4gc28gdGhhdCBl YWNoIGdyb3VwIGhhcyBpdHMgb3duLgo+ID4gPiAKPiA+ID4gTm90ZSB0aGF0IHR4X3NldF9pY19i aXQgaXMgdXBkYXRlZCBmcm9tIGJvdGggY29udGV4dHMuIFNwbGl0IHRoaXMgY291bnRlcgo+ID4g PiBzbyB0aGF0IGVhY2ggY29udGV4dCBnZXRzIGl0cyBvd24sIGFuZCBjYWxjdWxhdGUgdGhlaXIg c3VtIHRvIGdldCB0aGUgdG90YWwKPiA+ID4gdmFsdWUgaW4gc3RtbWFjX2dldF9ldGh0b29sX3N0 YXRzKCkuCj4gPiA+IAo+ID4gPiBGb3IgdGhlIHRoaXJkIGdyb3VwLCBtdWx0aXBsZSBpbnRlcnJ1 cHRzIG1heSBiZSBwcm9jZXNzZWQgYnkgZGlmZmVyZW50IENQVXMKPiA+ID4gYXQgdGhlIHNhbWUg dGltZSwgYnV0IGludGVycnVwdHMgb24gdGhlIHNhbWUgQ1BVIHdpbGwgbm90IG5lc3QuIE1vdmUg ZmllbGRzCj4gPiA+IGZyb20gdGhpcyBncm91cCB0byBhIG5ld2x5IGNyZWF0ZWQgcGVyLWNwdSBz dHJ1Y3Qgc3RtbWFjX3BjcHVfc3RhdHMuCj4gPiA+IAo+ID4gPiBGaXhlczogMTMzNDY2YzNiYmUx ICgibmV0OiBzdG1tYWM6IHVzZSBwZXItcXVldWUgNjQgYml0IHN0YXRpc3RpY3Mgd2hlcmUgbmVj ZXNzYXJ5IikKPiA+ID4gTGluazogaHR0cHM6Ly9sb3JlLmtlcm5lbC5vcmcvbmV0ZGV2L1phMTcz UGh2aVlnLTFxSW5AdG9ycmVzLnp1Z3NjaGx1cy5kZS90Lwo+ID4gPiBDYzogc3RhYmxlQHZnZXIu a2VybmVsLm9yZwo+ID4gPiBTaWduZWQtb2ZmLWJ5OiBQZXRyIFRlc2FyaWsgPHBldHJAdGVzYXJp Y2kuY3o+ICAKPiA+IAo+ID4gVGhhbmtzIGZvciB0aGUgZml4IHBhdGNoLiBPbmUgdHJpdmlhbCBp bXByb3ZpZW1lbnQgYmVsb3cKPiA+IHMvbmV0ZGV2X2FsbG9jX3BjcHVfc3RhdHMvZGV2bV9uZXRk ZXZfYWxsb2NfcGNwdV9zdGF0cyB0byBzaW1wbGlmeQo+ID4gZXJyb3IgYW5kIGV4aXQgY29kZSBw YXRoLgo+IAo+IFRoYW5rcyBmb3IgeW91ciByZXZpZXcuCj4gCj4gSW4gZmFjdCwgbWFueSBvdGhl ciBhbGxvY2F0aW9ucyBpbiBzdG1tYWMgY291bGQgYmUgY29udmVydGVkIHRvIGRldm1fKi4KPiBJ IHdhbnRlZCB0byBzdGF5IGNvbnNpc3RlbnQgd2l0aCB0aGUgZXhpc3RpbmcgY29kZSwgYnV0IGhl eSwgeW91J3JlCgp0aGVyZSdzIGFscmVhZHkgZGV2bV8qIHVzYWdlIGluIHN0bW1hY19kdnJfcHJv YmUoKSwgZWcuIGRldm1fYWxsb2NfZXRoZXJkZXZfbXFzCkkgYmVsaWV2ZSBvdGhlciBwYXJ0cyBh cmUgZnJvbSB0aGUgb2xkIGRheXMgd2hlbiB0aGVyZSdzIG5vIGRldm1fKiBBUElzCgo+IHJpZ2h0 IHRoZXJlJ3Mgbm8gZ29vZCByZWFzb24gZm9yIGl0Lgo+IAo+IFBsdXMsIEkgY2FuIHNlbmQgY29u dmVydCB0aGUgb3RoZXIgcGxhY2VzIHdpdGggYW5vdGhlciBwYXRjaC4KPiAKPiA+IFdpdGggdGhh dDoKPiA+IFJldmlld2VkLWJ5OiBKaXNoZW5nIFpoYW5nIDxqc3poYW5nQGtlcm5lbC5vcmc+Cj4g PiAKPiA+IFBTOiB3aGVuIEkgc2VudCB0aGUgYWJvdmUgIm5ldDogc3RtbWFjOiB1c2UgcGVyLXF1 ZXVlIDY0IGJpdCBzdGF0aXN0aWNzCj4gPiB3aGVyZSBuZWNlc3NhcnkiLCBJIGhhZCBhbiBpbXBy ZXNzaW9uOiB0aGVyZSBhcmUgdG9vIG11Y2ggc3RhdGlzdGljcyBpbgo+ID4gc3RtbWFjIGRyaXZl ciwgSSBkaWRuJ3Qgc2VlIHNvIG1hbnkgc3RhdGlzdGljcyBpbiBvdGhlciBldGggZHJpdmVycywg aXMKPiA+IGl0IHBvc3NpYmxlIHRvIHJlbW92ZSBzb21lIHVzZWxlc3Mgb3Igbm90IHRoYXQgdXNl ZnVsIHN0YXRpc3RpYyBtZW1iZXJzPwo+IAo+IEkgZG9uJ3QgZmVlbCBhdXRob3JpemVkIHRvIG1h a2UgdGhlIGRlY2lzaW9uLiBCdXQgSSBhbHNvIHdvbmRlciBhYm91dAo+IHNvbWUgY291bnRlcnMu IEZvciBleGFtcGxlLCB3aHkgaXMgdGhlcmUgdHhfcGFja2V0cyBhbmQgdHhfcGt0X24/IFRoZQo+ IGZvcm1lciBpcyBzaG93biBhcyBSWCBwYWNrZXRzIGJ5ICJpcCBzdGF0cyBzaG93IGRldiBlbmQw IiwgdGhlIGxhdHRlcgo+IGlzIHNob3duIGJ5IGFzIHR4X3BrdF9uIGJ5ICJldGh0b29scyAtUyBl bmQwIi4gVGhlIHZhbHVlcyBkbyBkaWZmZXIsCj4gYnV0IEkgaGF2ZSBubyBjbHVlIHdoeSwgYW5k IGlmIHRoZXkgYXJlIGV2ZW4gZXhwZWN0ZWQgdG8gYmUgZGlmZmVyZW50Cj4gb3IgaWYgaXQncyBh IGJ1Zy4KPiAKPiBQZXRyIFQKCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fCmxpbnV4LWFybS1rZXJuZWwgbWFpbGluZyBsaXN0CmxpbnV4LWFybS1rZXJuZWxA bGlzdHMuaW5mcmFkZWFkLm9yZwpodHRwOi8vbGlzdHMuaW5mcmFkZWFkLm9yZy9tYWlsbWFuL2xp c3RpbmZvL2xpbnV4LWFybS1rZXJuZWwK