From: "Daniel P. Berrangé" <berrange@redhat.com>
To: Zhao Liu <zhao1.liu@linux.intel.com>
Cc: "Eduardo Habkost" <eduardo@habkost.net>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Yanan Wang" <wangyanan55@huawei.com>,
"Michael S . Tsirkin" <mst@redhat.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Eric Blake" <eblake@redhat.com>,
"Markus Armbruster" <armbru@redhat.com>,
"Marcelo Tosatti" <mtosatti@redhat.com>,
qemu-devel@nongnu.org, kvm@vger.kernel.org,
"Babu Moger" <babu.moger@amd.com>,
"Xiaoyao Li" <xiaoyao.li@intel.com>,
"Zhenyu Wang" <zhenyu.z.wang@intel.com>,
"Zhuocheng Ding" <zhuocheng.ding@intel.com>,
"Yongwei Ma" <yongwei.ma@intel.com>,
"Zhao Liu" <zhao1.liu@intel.com>
Subject: Re: [PATCH v8 00/21] Introduce smp.modules for x86 in QEMU
Date: Wed, 31 Jan 2024 10:28:42 +0000 [thread overview]
Message-ID: <Zbog2vDrrWFbujrs@redhat.com> (raw)
In-Reply-To: <20240131101350.109512-1-zhao1.liu@linux.intel.com>
On Wed, Jan 31, 2024 at 06:13:29PM +0800, Zhao Liu wrote:
> From: Zhao Liu <zhao1.liu@intel.com>
>
> Hi list,
>
> This is the our v8 patch series, rebased on the master branch at the
> commit 11be70677c70 ("Merge tag 'pull-vfio-20240129' of
> https://github.com/legoater/qemu into staging").
>
> Compared with v7 [1], v8 mainly has the following changes:
> * Introduced smp.modules for x86 instead of reusing current
> smp.clusters.
> * Reworte the CPUID[0x1F] encoding.
>
> Given the code change, I dropped the most previously gotten tags
> (Acked-by/Reviewed-by/Tested-by from Michael & Babu, thanks for your
> previous reviews and tests!) in v8.
>
> With the description of the new modules added to x86 arch code in v7 [1]
> cover letter, the following sections are mainly the description of
> the newly added smp.modules (since v8) as supplement.
>
> Welcome your comments!
>
>
> Why We Need a New CPU Topology Level
> ====================================
>
> For the discussion in v7 about whether we should reuse current
> smp.clusters for x86 module, the core point is what's the essential
> differences between x86 module and general cluster.
>
> Since, cluster (for ARM/riscv) lacks a comprehensive and rigorous
> hardware definition, and judging from the description of smp.clusters
> [2] when it was introduced by QEMU, x86 module is very similar to
> general smp.clusters: they are all a layer above existing core level
> to organize the physical cores and share L2 cache.
>
> However, after digging deeper into the description and use cases of
> cluster in the device tree [3], I realized that the essential
> difference between clusters and modules is that cluster is an extremely
> abstract concept:
> * Cluster supports nesting though currently QEMU doesn't support
> nested cluster topology. However, modules will not support nesting.
> * Also due to nesting, there is great flexibility in sharing resources
> on clusters, rather than narrowing cluster down to sharing L2 (and
> L3 tags) as the lowest topology level that contains cores.
> * Flexible nesting of cluster allows it to correspond to any level
> between the x86 package and core.
>
> Based on the above considerations, and in order to eliminate the naming
> confusion caused by the mapping between general cluster and x86 module
> in v7, we now formally introduce smp.modules as the new topology level.
What is the Linux kernel calling this topology level on x86 ?
It will be pretty unfortunate if Linux and QEMU end up with
different names for the same topology level.
With regards,
Daniel
--
|: https://berrange.com -o- https://www.flickr.com/photos/dberrange :|
|: https://libvirt.org -o- https://fstop138.berrange.com :|
|: https://entangle-photo.org -o- https://www.instagram.com/dberrange :|
next prev parent reply other threads:[~2024-01-31 10:29 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-31 10:13 [PATCH v8 00/21] Introduce smp.modules for x86 in QEMU Zhao Liu
2024-01-31 10:13 ` [PATCH v8 01/21] hw/core/machine: Introduce the module as a CPU topology level Zhao Liu
2024-01-31 10:13 ` [PATCH v8 02/21] hw/core/machine: Support modules in -smp Zhao Liu
2024-01-31 10:13 ` [PATCH v8 03/21] hw/core: Introduce module-id as the topology subindex Zhao Liu
2024-01-31 10:13 ` [PATCH v8 04/21] hw/core: Support module-id in numa configuration Zhao Liu
2024-01-31 10:13 ` [PATCH v8 05/21] i386/cpu: Fix i/d-cache topology to core level for Intel CPU Zhao Liu
2024-01-31 10:13 ` [PATCH v8 06/21] i386/cpu: Use APIC ID info to encode cache topo in CPUID[4] Zhao Liu
2024-01-31 10:13 ` [PATCH v8 07/21] i386/cpu: Use APIC ID info get NumSharingCache for CPUID[0x8000001D].EAX[bits 25:14] Zhao Liu
2024-01-31 10:13 ` [PATCH v8 08/21] i386/cpu: Consolidate the use of topo_info in cpu_x86_cpuid() Zhao Liu
2024-02-07 5:59 ` Philippe Mathieu-Daudé
2024-01-31 10:13 ` [PATCH v8 09/21] i386/cpu: Introduce bitmap to cache available CPU topology levels Zhao Liu
2024-01-31 10:13 ` [PATCH v8 10/21] i386: Split topology types of CPUID[0x1F] from the definitions of CPUID[0xB] Zhao Liu
2024-02-07 6:00 ` Philippe Mathieu-Daudé
2024-01-31 10:13 ` [PATCH v8 11/21] i386/cpu: Decouple CPUID[0x1F] subleaf with specific topology level Zhao Liu
2024-01-31 10:13 ` [PATCH v8 12/21] i386: Introduce module level cpu topology to CPUX86State Zhao Liu
2024-01-31 10:13 ` [PATCH v8 13/21] i386: Support modules_per_die in X86CPUTopoInfo Zhao Liu
2024-01-31 10:13 ` [PATCH v8 14/21] i386: Expose module level in CPUID[0x1F] Zhao Liu
2024-01-31 10:13 ` [PATCH v8 15/21] i386: Support module_id in X86CPUTopoIDs Zhao Liu
2024-01-31 10:13 ` [PATCH v8 16/21] i386/cpu: Introduce module-id to X86CPU Zhao Liu
2024-01-31 10:13 ` [PATCH v8 17/21] tests: Add test case of APIC ID for module level parsing Zhao Liu
2024-01-31 10:13 ` [PATCH v8 18/21] hw/i386/pc: Support smp.modules for x86 PC machine Zhao Liu
2024-01-31 10:13 ` [PATCH v8 19/21] i386: Add cache topology info in CPUCacheInfo Zhao Liu
2024-01-31 10:13 ` [PATCH v8 20/21] i386/cpu: Use CPUCacheInfo.share_level to encode CPUID[4] Zhao Liu
2024-01-31 10:13 ` [PATCH v8 21/21] i386/cpu: Use CPUCacheInfo.share_level to encode CPUID[0x8000001D].EAX[bits 25:14] Zhao Liu
2024-01-31 10:28 ` Daniel P. Berrangé [this message]
2024-02-01 2:57 ` [PATCH v8 00/21] Introduce smp.modules for x86 in QEMU Zhao Liu
2024-02-01 9:21 ` Daniel P. Berrangé
2024-02-01 16:10 ` Zhao Liu
2024-02-08 16:52 ` Daniel P. Berrangé
2024-02-15 16:56 ` Zhao Liu
2024-02-21 12:41 ` Markus Armbruster
2024-02-21 15:15 ` Zhao Liu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=Zbog2vDrrWFbujrs@redhat.com \
--to=berrange@redhat.com \
--cc=armbru@redhat.com \
--cc=babu.moger@amd.com \
--cc=eblake@redhat.com \
--cc=eduardo@habkost.net \
--cc=kvm@vger.kernel.org \
--cc=marcel.apfelbaum@gmail.com \
--cc=mst@redhat.com \
--cc=mtosatti@redhat.com \
--cc=pbonzini@redhat.com \
--cc=philmd@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=richard.henderson@linaro.org \
--cc=wangyanan55@huawei.com \
--cc=xiaoyao.li@intel.com \
--cc=yongwei.ma@intel.com \
--cc=zhao1.liu@intel.com \
--cc=zhao1.liu@linux.intel.com \
--cc=zhenyu.z.wang@intel.com \
--cc=zhuocheng.ding@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.