From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7795BC4829A for ; Sun, 11 Feb 2024 07:14:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=4vQteGSjKJ4fW2opmlAGadbbOfUbvQpNl6TzfxntMZ0=; b=dvhffI4s5ZOGrU Rv1ZsGOEDJdCX+es8+FAvmWTiqCqxW9Sk1KMhK2iaavkhuLwS/ikUz8QhEMMUxLHaEsz9SDt76F0k wtQg3LXdoUqTyHXks4WfFKcXjczmvFgYGJN72vN+MmoUE+jAe3ZW2BHa7ZtCne8nZD4pcUNLusu8n gSmh/zzI6XWx+8m/G/RGqirqtjEI668s0sbqGlzQZz84858YiXfrKXd5v7NlthQtv8ZCkB51K64Ao XK1t34qHQpJ6epCSV7fDQXSTfjekxPiB2y2uNNq/F6FOU4q63h9ESvUje/8SbN0IUiFymcNtH5NdZ wTFD7cUVak4qh4oSqOqw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rZ42c-00000002Qlv-2DqV; Sun, 11 Feb 2024 07:14:18 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rZ42Z-00000002QlZ-1AGx for linux-arm-kernel@lists.infradead.org; Sun, 11 Feb 2024 07:14:16 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id B46A860B7B; Sun, 11 Feb 2024 07:14:13 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 370C5C433F1; Sun, 11 Feb 2024 07:14:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1707635653; bh=IdJDkr5ZzeEX9MfTnCmgBChSSZWeHpdVwmMyFYcLRlk=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=uFxBAt+doEWFLOFPN0LL90tV8AJr98OSqsYTD3jwLLsgQoRA92LVDdslUfCuCXPB6 tpLN0lbqrW9mCtghaxrMg72uJrh64lsHd47hLKrRiqz8XFSqE8NK88qN6darbJxAS7 K1Y73FuKLH+1Xk0/0srH5Wgy9btw5kgpFGrcrC4t8OAejkUVCuW8HSaQZnbyOZ89qx LFCVNtPuwRqb6fQir2soS7zotYNHVxAe3O+t3Y4hHr834aD00EC73PAMC+r5hrzryA wdPqjRidXOvPFX4qAL0PMWyMqA8wpHgnBmr0kq4BIuMsyOoXY1jypSRjWp/jMi/Io/ MGu/0xosGCTnQ== Date: Sun, 11 Feb 2024 15:01:15 +0800 From: Jisheng Zhang To: Arnd Bergmann Cc: Ard Biesheuvel , linux-arm-kernel@lists.infradead.org, Ard Biesheuvel , Nicolas Pitre , Russell King , Linus Walleij , Lubomir Rintel , Andrew Lunn , Sebastian Hesselbarth , Gregory Clement Subject: Re: [PATCH] ARM: iwmmxt: Remove support for PJ4/PJ4B cores Message-ID: References: <20240209110901.4032939-2-ardb+git@google.com> <0bc7c97c-6549-4ae1-9787-4702e7ab737e@app.fastmail.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <0bc7c97c-6549-4ae1-9787-4702e7ab737e@app.fastmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240210_231415_401452_ABBE5811 X-CRM114-Status: GOOD ( 26.11 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Feb 09, 2024 at 03:27:02PM +0100, Arnd Bergmann wrote: > On Fri, Feb 9, 2024, at 12:09, Ard Biesheuvel wrote: > > From: Ard Biesheuvel > > > > PJ4 is a v7 core that incorporates a iWMMXt coprocessor. However, GCC > > does not support this combination (its iWMMXt configuration always > > implies v5te), and so there is no v6/v7 user space that actually makes > > use of this, beyond generic support for things like setjmp() that > > preserve/restore the iWMMXt register file using generic LDC/STC > > instructions emitted in assembler. As [0] appears to imply, this logic > > is triggered for the init process at boot, and so most processes will > > have a iWMMXt register context associated with it, even though it is > > never used. > > > > This means that advertising iWMMXt support on these cores results in > > context switch overhead without any associated benefit, and so it is > > better to simply ignore the iWMMXt unit on these systems. So rip out the > > support. Doing so also fixes the issue reported in [0] related to UNDEF > > handling of co-processor #0/#1 instructions issued from user space > > running in Thumb2 mode. > > > > Cc: Arnd Bergmann > > Cc: Nicolas Pitre > > Cc: Russell King > > Cc: Linus Walleij > > Fixes: 8bcba70cb5c22 ("ARM: entry: Disregard Thumb undef exception ...") > > Link: https://bugzilla.kernel.org/show_bug.cgi?id=218427 [0] > > Signed-off-by: Ard Biesheuvel > > Acked-by: Arnd Bergmann For berlin SoC Reviewed-by: Jisheng Zhang > > Maybe add a bit about which cores are actually affected by this: > > The PJ4 cores are used in four platforms: armada 370/xp, dove > (cubox, d2plug), mmp2 (xo-1.75) and berlin (chromecast 1). Per berlin2cd.dtsi, chromecast is powered by CA9 ;) > Out of these, only the first is still widely used, but that > one actually doesn't have iwmmxt but instead has only > vfpv3-d16. > > I've also added the maintainers of those platforms to Cc, > in case anyone has objections after all. > > Arnd _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel