From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C7552C4829B for ; Mon, 12 Feb 2024 12:24:58 +0000 (UTC) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=H7ulLImf; dkim-atps=neutral Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4TYNvF2D1yz3dRJ for ; Mon, 12 Feb 2024 23:24:57 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=H7ulLImf; dkim-atps=neutral Authentication-Results: lists.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=linux.intel.com (client-ip=192.198.163.17; helo=mgamail.intel.com; envelope-from=andriy.shevchenko@linux.intel.com; receiver=lists.ozlabs.org) X-Greylist: delayed 64 seconds by postgrey-1.37 at boromir; Mon, 12 Feb 2024 23:24:13 AEDT Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4TYNtP0DyCz2yPq for ; Mon, 12 Feb 2024 23:24:12 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1707740653; x=1739276653; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=6pomjPZGL7vlncXPUaxh6XTFSH56FoFdulJV9sKaXDQ=; b=H7ulLImfd0WJEZoFphbrLg2QFEj8WQJV7wtAJvydwwZqdm8nM4uSVwcY ucqLM+p/9/DNor9reDv9Gz6ElqzFRkZASbCDIC5KHrU2a+qWgG7TyAUry GgFWYneEw4aVxt9q4PN+CmcJyOOXTe0loBvlTcZvFYb6JT8B/K/2NLIl1 TevZr9TRQuf09wHS4ZyecrY+vIexNro5zNUHhgh0W9SLcGgMhXOmrOvPD n9HRCtT7YARgSGGPdZm61BCWXRzgmmiM2WcR4f2EbRlUXgJFZhWTJupLz /4wsqk4bX3YwPzwwnDECtZQa5mv0bFzJOlABwr3e3alhe5G9rv/J8O5YE g==; X-IronPort-AV: E=McAfee;i="6600,9927,10981"; a="1591675" X-IronPort-AV: E=Sophos;i="6.06,263,1705392000"; d="scan'208";a="1591675" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Feb 2024 04:23:04 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10981"; a="911467880" X-IronPort-AV: E=Sophos;i="6.06,263,1705392000"; d="scan'208";a="911467880" Received: from smile.fi.intel.com ([10.237.72.54]) by fmsmga002.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Feb 2024 04:23:00 -0800 Received: from andy by smile.fi.intel.com with local (Exim 4.97) (envelope-from ) id 1rZVKr-00000003tHa-1I5A; Mon, 12 Feb 2024 14:22:57 +0200 Date: Mon, 12 Feb 2024 14:22:56 +0200 From: Andy Shevchenko To: Herve Codina Subject: Re: [PATCH v3 RESEND 1/6] net: wan: Add support for QMC HDLC Message-ID: References: <20240212075646.19114-1-herve.codina@bootlin.com> <20240212075646.19114-2-herve.codina@bootlin.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240212075646.19114-2-herve.codina@bootlin.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Lunn , Vadim Fedorenko , Yury Norov , netdev@vger.kernel.org, Rasmus Villemoes , linux-kernel@vger.kernel.org, Eric Dumazet , Mark Brown , Thomas Petazzoni , Jakub Kicinski , Paolo Abeni , linuxppc-dev@lists.ozlabs.org, "David S. Miller" Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Mon, Feb 12, 2024 at 08:56:29AM +0100, Herve Codina wrote: > The QMC HDLC driver provides support for HDLC using the QMC (QUICC > Multichannel Controller) to transfer the HDLC data. ... > +#include > +#include > +#include > +#include > +#include I do not see how these are being used, am I right? What's is missing OTOH is the mod_devicetable.h. > +#include > +#include + Blank line? > +#include -- With Best Regards, Andy Shevchenko From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 60CE41864C; Mon, 12 Feb 2024 12:23:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.17 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707740586; cv=none; b=B39AQCVkFdfx4bSyn8t3sD16KgJheidVItS7ela7VogpzI0n8dUwsyq8upJe64MiUJ7yfgY3PZxHiK6jxJlpVU6D0EeFSuN9ni3zhF0SDNgamOQPO2dAYA1ACBmNpDut79QR7/Pysk6z61pFiGvsgEaijU+Sc+wh6yg4ZMPy8/U= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707740586; c=relaxed/simple; bh=6pomjPZGL7vlncXPUaxh6XTFSH56FoFdulJV9sKaXDQ=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=uWtNZpDBlnTtV5B7cv1HONt1RPdlB314yG3SjLoTMUjmzmS+TLr8Y4CLPtPrR1J7jKDM8fLTwYyjejmkC9WNd46477gMTP2KiZgaeMxG48P3uPgCfqmrhcgAwkMfpApUf92nFodp5AXenC/X/H5qvDWdyereNNXpMzPIqRd9iDw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=MLijL2Df; arc=none smtp.client-ip=192.198.163.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="MLijL2Df" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1707740585; x=1739276585; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=6pomjPZGL7vlncXPUaxh6XTFSH56FoFdulJV9sKaXDQ=; b=MLijL2Df3q3yaFKIMh8DpAm2p99SzLxguhalgDBSUGLTcUqhzxteLeWP COw7kwZkMLTzHuKogzgy92zqK6KtPFgDBmexw1yxHq8qOFQNvqTmswGuO MzJPxFzfzEUGxdab2bEf0/xEz7/jA/SuJZtCPZgWLvNr4zDFEerOiR7JB SIH7MHd6OY138yh8kmrXuwLi2FfDz87hkZ8Z/d0uumjQDJ1vyA0xLSn2A ZqFuU01Y0QLFO81Q6nxEP0iVLAhrNzePTsB7bXzvsNo4G0eR3owKFcvnx ptFzIbj4oh667a7kvxjHcndLBqwwAkxepjsX5/pZ0PvSEvIEBT1syF67r Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10981"; a="1591672" X-IronPort-AV: E=Sophos;i="6.06,263,1705392000"; d="scan'208";a="1591672" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Feb 2024 04:23:04 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10981"; a="911467880" X-IronPort-AV: E=Sophos;i="6.06,263,1705392000"; d="scan'208";a="911467880" Received: from smile.fi.intel.com ([10.237.72.54]) by fmsmga002.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Feb 2024 04:23:00 -0800 Received: from andy by smile.fi.intel.com with local (Exim 4.97) (envelope-from ) id 1rZVKr-00000003tHa-1I5A; Mon, 12 Feb 2024 14:22:57 +0200 Date: Mon, 12 Feb 2024 14:22:56 +0200 From: Andy Shevchenko To: Herve Codina Cc: Vadim Fedorenko , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Yury Norov , Rasmus Villemoes , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, Andrew Lunn , Mark Brown , Christophe Leroy , Thomas Petazzoni Subject: Re: [PATCH v3 RESEND 1/6] net: wan: Add support for QMC HDLC Message-ID: References: <20240212075646.19114-1-herve.codina@bootlin.com> <20240212075646.19114-2-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240212075646.19114-2-herve.codina@bootlin.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo On Mon, Feb 12, 2024 at 08:56:29AM +0100, Herve Codina wrote: > The QMC HDLC driver provides support for HDLC using the QMC (QUICC > Multichannel Controller) to transfer the HDLC data. ... > +#include > +#include > +#include > +#include > +#include I do not see how these are being used, am I right? What's is missing OTOH is the mod_devicetable.h. > +#include > +#include + Blank line? > +#include -- With Best Regards, Andy Shevchenko