Re: [PATCH 1/2] perf, capstone: Support 32bit code under 64bit OS

[Andi Kleen <ak@linux.intel.com>]

On Wed, Feb 28, 2024 at 07:00:06PM +0800, Changbin Du wrote:
> On Tue, Feb 27, 2024 at 03:48:04PM -0800, Andi Kleen wrote:
> > Use the DSO to resolve whether an IP is 32bit or 64bit and use that to
> > configure capstone to the correct mode. This allows to correctly
> > disassemble 32bit code under a 64bit OS.
> > 
> > % cat > loop.c
> > volatile int var;
> > int main(void)
> > {
> > 	int i;
> > 	for (i = 0; i < 100000; i++)
> > 		var++;
> > }
> > % gcc -m32 -o loop loop.c
> > % perf record -e cycles:u ./loop
> > % perf script -F +disasm
> >             loop   82665 1833176.618023:          1 cycles:u:          f7eed500 _start+0x0 (/usr/lib/ld-linux.so.2)             movl %esp, %eax
> >             loop   82665 1833176.618029:          1 cycles:u:          f7eed500 _start+0x0 (/usr/lib/ld-linux.so.2)             movl %esp, %eax
> >             loop   82665 1833176.618031:          7 cycles:u:          f7eed500 _start+0x0 (/usr/lib/ld-linux.so.2)             movl %esp, %eax
> >             loop   82665 1833176.618034:         91 cycles:u:          f7eed500 _start+0x0 (/usr/lib/ld-linux.so.2)             movl %esp, %eax
> >             loop   82665 1833176.618036:       1242 cycles:u:          f7eed500 _start+0x0 (/usr/lib/ld-linux.so.2)             movl %esp, %eax
> > 
> > Signed-off-by: Andi Kleen <ak@linux.intel.com>
> > ---
> >  tools/perf/util/print_insn.c | 20 +++++++++++++++++---
> >  1 file changed, 17 insertions(+), 3 deletions(-)
> > 
> > diff --git a/tools/perf/util/print_insn.c b/tools/perf/util/print_insn.c
> > index 459e0e93d7b1..bd7a95e64ce5 100644
> > --- a/tools/perf/util/print_insn.c
> > +++ b/tools/perf/util/print_insn.c
> > @@ -12,6 +12,8 @@
> >  #include "machine.h"
> >  #include "thread.h"
> >  #include "print_insn.h"
> > +#include "map.h"
> > +#include "dso.h"
> >  
> >  size_t sample__fprintf_insn_raw(struct perf_sample *sample, FILE *fp)
> >  {
> > @@ -28,12 +30,12 @@ size_t sample__fprintf_insn_raw(struct perf_sample *sample, FILE *fp)
> >  #ifdef HAVE_LIBCAPSTONE_SUPPORT
> >  #include <capstone/capstone.h>
> >  
> > -static int capstone_init(struct machine *machine, csh *cs_handle)
> > +static int capstone_init(struct machine *machine, csh *cs_handle, bool is64)
> >  {
> >  	cs_arch arch;
> >  	cs_mode mode;
> >  
> > -	if (machine__is(machine, "x86_64")) {
> > +	if (machine__is(machine, "x86_64") && is64) {
> >  		arch = CS_ARCH_X86;
> >  		mode = CS_MODE_64;
> >  	} else if (machine__normalized_is(machine, "x86")) {
> > @@ -101,9 +103,21 @@ size_t sample__fprintf_insn_asm(struct perf_sample *sample, struct thread *threa
> >  	size_t count;
> >  	size_t printed = 0;
> >  	int ret;
> > +	struct addr_location al;
> > +	bool is64bit = machine__is(machine, "x86_64");
> > +	struct dso *dso;
> > +
> > +	addr_location__init(&al);
> > +	if (thread__find_map(thread, sample->cpumode, sample->ip, &al) &&
> > +		(dso = map__dso(al.map)) != NULL &&
> > +		(dso->data.status != DSO_DATA_STATUS_ERROR)) {
> > +		map__load(al.map);
> > +		is64bit = dso->is_64_bit;
> > +	}
> > +	addr_location__exit(&al);
> >
> This could be extracted as a standalone function. And this should apply to arm64
> also.

It should work for ARM64 too, at least for the sample case which it
supports. I haven't tested it however because I don't have such a
system.

-Andi