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From: Zhao Liu <zhao1.liu@intel.com>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: qemu-devel@nongnu.org, richard.henderson@linaro.org, mcb30@ipxe.org
Subject: Re: [PATCH v2 4/7] target/i386: use separate MMU indexes for 32-bit accesses
Date: Mon, 26 Feb 2024 16:36:33 +0800	[thread overview]
Message-ID: <ZdxNkStjZyB6iJtk@intel.com> (raw)
In-Reply-To: <20240223130948.237186-5-pbonzini@redhat.com>

On Fri, Feb 23, 2024 at 02:09:45PM +0100, Paolo Bonzini wrote:
> Date: Fri, 23 Feb 2024 14:09:45 +0100
> From: Paolo Bonzini <pbonzini@redhat.com>
> Subject: [PATCH v2 4/7] target/i386: use separate MMU indexes for 32-bit
>  accesses
> X-Mailer: git-send-email 2.43.0
> 
> Accesses from a 32-bit environment (32-bit code segment for instruction
> accesses, EFER.LMA==0 for processor accesses) have to mask away the
> upper 32 bits of the address.  While a bit wasteful, the easiest way
> to do so is to use separate MMU indexes.  These days, QEMU anyway is
> compiled with a fixed value for NB_MMU_MODES.  Split MMU_USER_IDX,
> MMU_KSMAP_IDX and MMU_KNOSMAP_IDX in two.

Maybe s/in/into/ ?

> 
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
> ---
>  target/i386/cpu.h                    | 34 ++++++++++++++++++++--------
>  target/i386/cpu.c                    | 11 +++++----
>  target/i386/tcg/sysemu/excp_helper.c |  3 ++-
>  3 files changed, 33 insertions(+), 15 deletions(-)
> 

[snip]

>  
>  static inline int cpu_mmu_index_kernel(CPUX86State *env)
>  {
> -    return !(env->hflags & HF_SMAP_MASK) ? MMU_KNOSMAP_IDX :
> -        ((env->hflags & HF_CPL_MASK) < 3 && (env->eflags & AC_MASK))
> -        ? MMU_KNOSMAP_IDX : MMU_KSMAP_IDX;
> +    int mmu_index_32 = (env->hflags & HF_LMA_MASK) ? 1 : 0;
> +    int mmu_index_base =
> +        !(env->hflags & HF_SMAP_MASK) ? MMU_KNOSMAP64_IDX :
> +        ((env->hflags & HF_CPL_MASK) < 3 && (env->eflags & AC_MASK)) ? MMU_KNOSMAP64_IDX : MMU_KSMAP64_IDX;

Change the line?



  reply	other threads:[~2024-02-26  8:23 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-23 13:09 [PATCH v2 0/7] target/i386: Fix physical address masking bugs Paolo Bonzini
2024-02-23 13:09 ` [PATCH v2 1/7] target/i386: mask high bits of CR3 in 32-bit mode Paolo Bonzini
2024-02-26  8:04   ` Zhao Liu
2024-02-23 13:09 ` [PATCH v2 2/7] target/i386: check validity of VMCB addresses Paolo Bonzini
2024-02-23 13:09 ` [PATCH v2 3/7] target/i386: introduce function to query MMU indices Paolo Bonzini
2024-02-26  8:05   ` Zhao Liu
2024-02-23 13:09 ` [PATCH v2 4/7] target/i386: use separate MMU indexes for 32-bit accesses Paolo Bonzini
2024-02-26  8:36   ` Zhao Liu [this message]
2024-02-26  9:55     ` Paolo Bonzini
2024-02-26 12:59       ` Zhao Liu
2024-02-23 13:09 ` [PATCH v2 5/7] target/i386: Fix physical address truncation Paolo Bonzini
2024-02-26  8:31   ` Zhao Liu
2024-02-23 13:09 ` [PATCH v2 6/7] target/i386: remove unnecessary/wrong application of the A20 mask Paolo Bonzini
2024-02-23 13:09 ` [PATCH v2 7/7] target/i386: leave the A20 bit set in the final NPT walk Paolo Bonzini
2024-02-23 17:57 ` [PATCH v2 0/7] target/i386: Fix physical address masking bugs Michael Brown

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