From: Zhao Liu <zhao1.liu@intel.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-devel@nongnu.org, "Paolo Bonzini" <pbonzini@redhat.com>,
"Daniel P. Berrangé" <berrange@redhat.com>,
"Eduardo Habkost" <eduardo@habkost.net>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Yanan Wang" <wangyanan55@huawei.com>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Gonglei (Arei)" <arei.gonglei@huawei.com>
Subject: Re: [PATCH 01/10] hw/i386: Store pointers to IDE buses in PCMachineState
Date: Mon, 26 Feb 2024 21:54:39 +0800 [thread overview]
Message-ID: <ZdyYH1IwzaE+A4Cq@intel.com> (raw)
In-Reply-To: <20240220160622.114437-2-peter.maydell@linaro.org>
On Tue, Feb 20, 2024 at 04:06:13PM +0000, Peter Maydell wrote:
> Date: Tue, 20 Feb 2024 16:06:13 +0000
> From: Peter Maydell <peter.maydell@linaro.org>
> Subject: [PATCH 01/10] hw/i386: Store pointers to IDE buses in
> PCMachineState
> X-Mailer: git-send-email 2.34.1
>
> Add the two IDE bus BusState pointers to the set we keep in PCMachineState.
> This allows us to avoid passing them to pc_cmos_init(), and also will
> allow a refactoring of how we call pc_cmos_init_late().
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
> include/hw/i386/pc.h | 4 +++-
> hw/i386/pc.c | 5 ++---
> hw/i386/pc_piix.c | 16 +++++++---------
> hw/i386/pc_q35.c | 9 ++++-----
> 4 files changed, 16 insertions(+), 18 deletions(-)
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
>
> diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
> index ec0e5efcb28..8f8ac894b10 100644
> --- a/include/hw/i386/pc.h
> +++ b/include/hw/i386/pc.h
> @@ -17,6 +17,8 @@
>
> #define HPET_INTCAP "hpet-intcap"
>
> +#define MAX_IDE_BUS 2
> +
> /**
> * PCMachineState:
> * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling
> @@ -37,6 +39,7 @@ typedef struct PCMachineState {
> PFlashCFI01 *flash[2];
> ISADevice *pcspk;
> DeviceState *iommu;
> + BusState *idebus[MAX_IDE_BUS];
>
> /* Configuration options: */
> uint64_t max_ram_below_4g;
> @@ -182,7 +185,6 @@ void pc_basic_device_init(struct PCMachineState *pcms,
> bool create_fdctrl,
> uint32_t hpet_irqs);
> void pc_cmos_init(PCMachineState *pcms,
> - BusState *ide0, BusState *ide1,
> ISADevice *s);
> void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus);
>
> diff --git a/hw/i386/pc.c b/hw/i386/pc.c
> index 196827531a5..8b0f54e284c 100644
> --- a/hw/i386/pc.c
> +++ b/hw/i386/pc.c
> @@ -574,7 +574,6 @@ static void pc_cmos_init_late(void *opaque)
> }
>
> void pc_cmos_init(PCMachineState *pcms,
> - BusState *idebus0, BusState *idebus1,
> ISADevice *rtc)
> {
> int val;
> @@ -634,8 +633,8 @@ void pc_cmos_init(PCMachineState *pcms,
>
> /* hard drives and FDC */
> arg.rtc_state = s;
> - arg.idebus[0] = idebus0;
> - arg.idebus[1] = idebus1;
> + arg.idebus[0] = pcms->idebus[0];
> + arg.idebus[1] = pcms->idebus[1];
> qemu_register_reset(pc_cmos_init_late, &arg);
> }
>
> diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
> index 999b7b806ca..8df88a6ccd1 100644
> --- a/hw/i386/pc_piix.c
> +++ b/hw/i386/pc_piix.c
> @@ -68,7 +68,6 @@
> #include "kvm/kvm-cpu.h"
> #include "target/i386/cpu.h"
>
> -#define MAX_IDE_BUS 2
> #define XEN_IOAPIC_NUM_PIRQS 128ULL
>
> #ifdef CONFIG_IDE_ISA
> @@ -114,7 +113,6 @@ static void pc_init1(MachineState *machine,
> Object *piix4_pm = NULL;
> qemu_irq smi_irq;
> GSIState *gsi_state;
> - BusState *idebus[MAX_IDE_BUS];
> ISADevice *rtc_state;
> MemoryRegion *ram_memory;
> MemoryRegion *pci_memory = NULL;
> @@ -299,8 +297,8 @@ static void pc_init1(MachineState *machine,
> piix4_pm = object_resolve_path_component(OBJECT(pci_dev), "pm");
> dev = DEVICE(object_resolve_path_component(OBJECT(pci_dev), "ide"));
> pci_ide_create_devs(PCI_DEVICE(dev));
> - idebus[0] = qdev_get_child_bus(dev, "ide.0");
> - idebus[1] = qdev_get_child_bus(dev, "ide.1");
> + pcms->idebus[0] = qdev_get_child_bus(dev, "ide.0");
> + pcms->idebus[1] = qdev_get_child_bus(dev, "ide.1");
> } else {
> isa_bus = isa_bus_new(NULL, system_memory, system_io,
> &error_abort);
> @@ -312,8 +310,8 @@ static void pc_init1(MachineState *machine,
>
> i8257_dma_init(OBJECT(machine), isa_bus, 0);
> pcms->hpet_enabled = false;
> - idebus[0] = NULL;
> - idebus[1] = NULL;
> + pcms->idebus[0] = NULL;
> + pcms->idebus[1] = NULL;
> }
>
> if (x86ms->pic == ON_OFF_AUTO_ON || x86ms->pic == ON_OFF_AUTO_AUTO) {
> @@ -342,7 +340,7 @@ static void pc_init1(MachineState *machine,
> pc_nic_init(pcmc, isa_bus, pci_bus);
>
> if (pcmc->pci_enabled) {
> - pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
> + pc_cmos_init(pcms, rtc_state);
> }
> #ifdef CONFIG_IDE_ISA
> else {
> @@ -361,9 +359,9 @@ static void pc_init1(MachineState *machine,
> * second one.
> */
> busname[4] = '0' + i;
> - idebus[i] = qdev_get_child_bus(DEVICE(dev), busname);
> + pcms->idebus[i] = qdev_get_child_bus(DEVICE(dev), busname);
> }
> - pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
> + pc_cmos_init(pcms, rtc_state);
> }
> #endif
>
> diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
> index d346fa3b1d6..71402c36eb2 100644
> --- a/hw/i386/pc_q35.c
> +++ b/hw/i386/pc_q35.c
> @@ -126,7 +126,6 @@ static void pc_q35_init(MachineState *machine)
> PCIBus *host_bus;
> PCIDevice *lpc;
> DeviceState *lpc_dev;
> - BusState *idebus[MAX_SATA_PORTS];
> ISADevice *rtc_state;
> MemoryRegion *system_memory = get_system_memory();
> MemoryRegion *system_io = get_system_io();
> @@ -300,13 +299,13 @@ static void pc_q35_init(MachineState *machine)
> ICH9_SATA1_FUNC),
> "ich9-ahci");
> ich9 = ICH9_AHCI(pdev);
> - idebus[0] = qdev_get_child_bus(DEVICE(pdev), "ide.0");
> - idebus[1] = qdev_get_child_bus(DEVICE(pdev), "ide.1");
> + pcms->idebus[0] = qdev_get_child_bus(DEVICE(pdev), "ide.0");
> + pcms->idebus[1] = qdev_get_child_bus(DEVICE(pdev), "ide.1");
> g_assert(MAX_SATA_PORTS == ich9->ahci.ports);
> ide_drive_get(hd, ich9->ahci.ports);
> ahci_ide_create_devs(&ich9->ahci, hd);
> } else {
> - idebus[0] = idebus[1] = NULL;
> + pcms->idebus[0] = pcms->idebus[1] = NULL;
> }
>
> if (machine_usb(machine)) {
> @@ -327,7 +326,7 @@ static void pc_q35_init(MachineState *machine)
> smbus_eeprom_init(pcms->smbus, 8, NULL, 0);
> }
>
> - pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
> + pc_cmos_init(pcms, rtc_state);
>
> /* the rest devices to which pci devfn is automatically assigned */
> pc_vga_init(isa_bus, host_bus);
> --
> 2.34.1
>
>
next prev parent reply other threads:[~2024-02-26 14:54 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-20 16:06 [PATCH 00/10] reset: Make whole system three-phase-reset aware Peter Maydell
2024-02-20 16:06 ` [PATCH 01/10] hw/i386: Store pointers to IDE buses in PCMachineState Peter Maydell
2024-02-20 19:30 ` Richard Henderson
2024-02-21 13:07 ` Philippe Mathieu-Daudé
2024-02-21 13:51 ` Philippe Mathieu-Daudé
2024-02-26 13:54 ` Zhao Liu [this message]
2024-02-20 16:06 ` [PATCH 02/10] hw/i386/pc: Do pc_cmos_init_late() from pc_machine_done() Peter Maydell
2024-02-20 19:31 ` Richard Henderson
2024-02-20 21:19 ` Peter Maydell
2024-02-20 23:10 ` Bernhard Beschow
2024-02-21 15:21 ` Philippe Mathieu-Daudé
2024-02-26 14:09 ` Zhao Liu
2024-02-20 16:06 ` [PATCH 03/10] system/bootdevice: Don't unregister reset handler in restore_boot_order() Peter Maydell
2024-02-20 19:35 ` Richard Henderson
2024-02-26 14:16 ` Zhao Liu
2024-02-20 16:06 ` [PATCH 04/10] include/qom/object.h: New OBJECT_DEFINE_SIMPLE_TYPE{, _WITH_INTERFACES} macros Peter Maydell
2024-02-20 19:40 ` Richard Henderson
2024-02-26 14:33 ` Zhao Liu
2024-02-20 16:06 ` [PATCH 05/10] hw/core: Add documentation and license comments to reset.h Peter Maydell
2024-02-20 19:41 ` Richard Henderson
2024-02-26 14:27 ` Zhao Liu
2024-02-26 14:28 ` Peter Maydell
2024-02-20 16:06 ` [PATCH 06/10] hw/core: Add ResetContainer which holds objects implementing Resettable Peter Maydell
2024-02-20 19:43 ` Richard Henderson
2024-02-20 19:46 ` Richard Henderson
2024-02-20 21:20 ` Peter Maydell
2024-02-26 14:42 ` Peter Maydell
2024-02-21 15:34 ` Philippe Mathieu-Daudé
2024-02-21 16:09 ` Peter Maydell
2024-02-21 17:06 ` Philippe Mathieu-Daudé
2024-02-27 3:36 ` Zhao Liu
2024-02-20 16:06 ` [PATCH 07/10] hw/core/reset: Add qemu_{register, unregister}_resettable() Peter Maydell
2024-02-20 19:59 ` Richard Henderson
2024-02-27 6:02 ` Zhao Liu
2024-02-20 16:06 ` [PATCH 08/10] hw/core/reset: Implement qemu_register_reset via qemu_register_resettable Peter Maydell
2024-02-20 20:06 ` Richard Henderson
2024-02-27 6:18 ` Zhao Liu
2024-02-20 16:06 ` [PATCH 09/10] hw/core/machine: Use qemu_register_resettable for sysbus reset Peter Maydell
2024-02-20 19:06 ` Philippe Mathieu-Daudé
2024-02-20 19:18 ` Peter Maydell
2024-02-20 20:09 ` Richard Henderson
2024-02-21 15:42 ` Philippe Mathieu-Daudé
2024-02-27 6:27 ` Zhao Liu
2024-02-20 16:06 ` [PATCH 10/10] docs/devel/reset: Update to discuss system reset Peter Maydell
2024-02-20 20:13 ` Richard Henderson
2024-02-27 6:30 ` Zhao Liu
2024-02-20 21:38 ` [PATCH 00/10] reset: Make whole system three-phase-reset aware Michael S. Tsirkin
2024-02-21 11:59 ` Mark Cave-Ayland
2024-02-26 14:50 ` Peter Maydell
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