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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Jani Nikula <jani.nikula@intel.com>
Cc: intel-gfx@lists.freedesktop.org, Arun R Murthy <arun.r.murthy@intel.com>
Subject: Re: [PATCH v3 6/6] drm/i915/mst: enable MST mode for 128b/132b single-stream sideband
Date: Fri, 15 Mar 2024 13:29:43 +0200	[thread overview]
Message-ID: <ZfQxJ7OFYq0QTxkj@intel.com> (raw)
In-Reply-To: <1945e70fb2d39c690644f2ec0d9c3d4a4e032cb6.1709733981.git.jani.nikula@intel.com>

On Wed, Mar 06, 2024 at 04:07:17PM +0200, Jani Nikula wrote:
> If the sink supports 128b/132b and single-stream sideband messaging,
> enable MST mode.
> 
> With this, the topology manager will still write DP_MSTM_CTRL, which
> should be ignored by the sink. In the future, the topology manager
> should probably only set the sideband messaging related parts of the
> register.
> 
> Cc: Arun R Murthy <arun.r.murthy@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 3956604d8b00..4787dc15797a 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -4069,7 +4069,8 @@ intel_dp_mst_mode_choose(struct intel_dp *intel_dp,
>  	if (!intel_dp_mst_source_support(intel_dp))
>  		return DRM_DP_SST;
>  
> -	if (sink_mst_mode == DRM_DP_SST_SIDEBAND_MSG)
> +	if (sink_mst_mode == DRM_DP_SST_SIDEBAND_MSG &&
> +	    !(intel_dp->dpcd[DP_MAIN_LINK_CHANNEL_CODING] & DP_CAP_ANSI_128B132B))
>  		return DRM_DP_SST;

The one question that comes to mind is whether we actually
want to use SST+sideband? I don't think there can be sinks
that only support SST+sideband but don't support SST+no-sideband
can there?

The benefits from using the no-sideband path would be:
- Use optimal link configuration instead of the max.
  I suppose we could make intel_dp_mst.c do this as well,
  at least for the SST+sideband.

- Port sync is not supported by intel_dp_mst.c currently.
  Though I think current hw should be capable of port sync even
  in full MST mode, just need to implement it.

- intel_dp_mst.c is currently limited to 8bpc.
  We should just remove that restriction now that Imre's bandwidth
  stuff should be able to cope with link bw limits properly.

OK, so all those benefits are more or less artificial at this point,
and we could work towards fixing them, even for MST proper.

Anyways, we can revisit this later if we decide that no-sideband
is the better choice for whatever reason.

Series is:
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

>  
>  	return sink_mst_mode;
> -- 
> 2.39.2

-- 
Ville Syrjälä
Intel

  reply	other threads:[~2024-03-15 11:29 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-06 14:07 [PATCH v3 0/6] drm/i915/mst: enable MST mode for 128b/132b single-stream sideband Jani Nikula
2024-03-06 14:07 ` Jani Nikula
2024-03-06 14:07 ` [PATCH v3 1/6] drm/mst: read sideband messaging cap Jani Nikula
2024-03-06 14:07   ` Jani Nikula
2024-03-06 14:07 ` [PATCH v3 2/6] drm/i915/mst: improve debug logging of DP MST mode detect Jani Nikula
2024-03-06 14:07   ` Jani Nikula
2024-03-06 14:07 ` [PATCH v3 3/6] drm/i915/mst: abstract choosing the MST mode to use Jani Nikula
2024-03-06 14:07   ` Jani Nikula
2024-03-06 14:07 ` [PATCH v3 4/6] drm/i915/mst: use the MST mode detected previously Jani Nikula
2024-03-06 14:07   ` Jani Nikula
2024-03-06 14:07 ` [PATCH v3 5/6] drm/i915/mst: add intel_dp_mst_disconnect() Jani Nikula
2024-03-06 14:07   ` Jani Nikula
2024-03-06 14:07 ` [PATCH v3 6/6] drm/i915/mst: enable MST mode for 128b/132b single-stream sideband Jani Nikula
2024-03-06 14:07   ` Jani Nikula
2024-03-15 11:29   ` Ville Syrjälä [this message]
2024-03-06 23:03 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/mst: enable MST mode for 128b/132b single-stream sideband (rev4) Patchwork
2024-03-06 23:04 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-03-06 23:18 ` ✓ Fi.CI.BAT: success " Patchwork
2024-03-07 16:18 ` ✗ Fi.CI.IGT: failure " Patchwork

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