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d="scan'208";a="827789556" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by orsmga001.jf.intel.com with SMTP; 02 Apr 2024 12:50:08 -0700 Received: by stinkbox (sSMTP sendmail emulation); Tue, 02 Apr 2024 22:50:07 +0300 Date: Tue, 2 Apr 2024 22:50:07 +0300 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= To: "Murthy, Arun R" Cc: "intel-gfx@lists.freedesktop.org" Subject: Re: [PATCH 18/22] drm/i915: Handle joined pipes inside hsw_crtc_disable() Message-ID: References: <20240329011254.24160-1-ville.syrjala@linux.intel.com> <20240329011254.24160-19-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: X-Patchwork-Hint: comment X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Mon, Apr 01, 2024 at 06:46:20AM +0000, Murthy, Arun R wrote: > > > -----Original Message----- > > From: Intel-gfx On Behalf Of Ville > > Syrjala > > Sent: Friday, March 29, 2024 6:43 AM > > To: intel-gfx@lists.freedesktop.org > > Subject: [PATCH 18/22] drm/i915: Handle joined pipes inside hsw_crtc_disable() > > > > From: Ville Syrjälä > > > > Reorganize the crtc disable path to only deal with the master pipes/transcoders > > in intel_old_crtc_state_disables() and offload the handling of joined pipes to > > hsw_crtc_disable(). > > This makes the whole thing much more sensible since we can actually control > > the order in which we do the per-pipe vs. > > per-transcoder modeset steps. > > > > v2: Use the name 'pipe_crtc' for the per-pipe crtc pointer > > > > Signed-off-by: Ville Syrjälä > > --- > > drivers/gpu/drm/i915/display/intel_display.c | 64 ++++++++++++-------- > > 1 file changed, 39 insertions(+), 25 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c > > b/drivers/gpu/drm/i915/display/intel_display.c > > index 58ee40786d5c..c15ea046c62a 100644 > > --- a/drivers/gpu/drm/i915/display/intel_display.c > > +++ b/drivers/gpu/drm/i915/display/intel_display.c > > @@ -1791,29 +1791,28 @@ static void hsw_crtc_disable(struct > > intel_atomic_state *state, > > const struct intel_crtc_state *old_crtc_state = > > intel_atomic_get_old_crtc_state(state, crtc); > > struct drm_i915_private *i915 = to_i915(crtc->base.dev); > > + struct intel_crtc *pipe_crtc; > > > > /* > > * FIXME collapse everything to one hook. > > * Need care with mst->ddi interactions. > > */ > > - if (!intel_crtc_is_bigjoiner_slave(old_crtc_state)) { > > - intel_encoders_disable(state, crtc); > > - intel_encoders_post_disable(state, crtc); > > - } > > - > > - intel_disable_shared_dpll(old_crtc_state); > > + intel_encoders_disable(state, crtc); > > + intel_encoders_post_disable(state, crtc); > > > > - if (!intel_crtc_is_bigjoiner_slave(old_crtc_state)) { > > - struct intel_crtc *slave_crtc; > > + for_each_intel_crtc_in_pipe_mask(&i915->drm, pipe_crtc, > > + > > intel_crtc_joined_pipe_mask(old_crtc_state)) { > > + const struct intel_crtc_state *old_pipe_crtc_state = > > + intel_atomic_get_old_crtc_state(state, pipe_crtc); > > > > - intel_encoders_post_pll_disable(state, crtc); > > + intel_disable_shared_dpll(old_pipe_crtc_state); > > + } > > As per the sequence is considered, should the pll be disabled prior to disabling the encoders and then followed by post_pll_disable? The correct disable order is: 1. encoder disable() 2. disable transcoder/etc. (nop for hsw+ as that stuff has been sucked into the encoder hooks) 3. encoder post_disable() 4. pll disable 5. encoder post_pll_disable() which we should be following here, thouh the diff is rather hard to read due to the indentation changes. -- Ville Syrjälä Intel