All of lore.kernel.org
 help / color / mirror / Atom feed
From: Chao Gao <chao.gao@intel.com>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: <linux-kernel@vger.kernel.org>, <kvm@vger.kernel.org>,
	Sean Christopherson <seanjc@google.com>,
	Isaku Yamahata <isaku.yamahata@intel.com>,
	Xiaoyao Li <xiaoyao.li@intel.com>,
	Binbin Wu <binbin.wu@linux.intel.com>
Subject: Re: [PATCH 02/10] KVM: x86/mmu: Replace hardcoded value 0 for the initial value for SPTE
Date: Mon, 15 Apr 2024 20:53:00 +0800	[thread overview]
Message-ID: <Zh0jLB5Ym8eUPLp2@chao-email> (raw)
In-Reply-To: <20240412173532.3481264-3-pbonzini@redhat.com>

>@@ -194,7 +196,7 @@ extern u64 __read_mostly shadow_nonpresent_or_rsvd_mask;
>  *
>  * Only used by the TDP MMU.
>  */
>-#define REMOVED_SPTE	0x5a0ULL
>+#define REMOVED_SPTE	(SHADOW_NONPRESENT_VALUE | 0x5a0ULL)
> 

"Use only low bits to avoid 64-bit immediates" in the comment above becomes
stale w/ patch 3 applied.

  reply	other threads:[~2024-04-15 12:53 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-12 17:35 [PATCH 00/10] KVM: MMU changes for confidential computing Paolo Bonzini
2024-04-12 17:35 ` [PATCH 01/10] KVM: Allow page-sized MMU caches to be initialized with custom 64-bit values Paolo Bonzini
2024-04-12 17:35 ` [PATCH 02/10] KVM: x86/mmu: Replace hardcoded value 0 for the initial value for SPTE Paolo Bonzini
2024-04-15 12:53   ` Chao Gao [this message]
2024-04-12 17:35 ` [PATCH 03/10] KVM: x86/mmu: Allow non-zero value for non-present SPTE and removed SPTE Paolo Bonzini
2024-04-12 17:35 ` [PATCH 04/10] KVM: x86/mmu: Add Suppress VE bit to EPT shadow_mmio_mask/shadow_present_mask Paolo Bonzini
2024-04-15 13:07   ` Chao Gao
2024-04-16 17:41     ` Paolo Bonzini
2024-04-12 17:35 ` [PATCH 05/10] KVM: x86/mmu: Track shadow MMIO value on a per-VM basis Paolo Bonzini
2024-04-12 17:35 ` [PATCH 06/10] KVM, x86: add architectural support code for #VE Paolo Bonzini
2024-04-12 17:35 ` [PATCH 07/10] KVM: VMX: Introduce test mode related to EPT violation VE Paolo Bonzini
2024-04-15 13:21   ` Chao Gao
2024-04-16 17:52     ` Paolo Bonzini
2024-04-12 17:35 ` [PATCH 08/10] KVM: x86/mmu: Pass around full 64-bit error code for KVM page faults Paolo Bonzini
2024-04-12 17:35 ` [PATCH 09/10] KVM: x86/mmu: Use PFERR_GUEST_ENC_MASK to indicate fault is private Paolo Bonzini
2024-04-12 17:35 ` [PATCH 10/10] KVM: x86/mmu: check for invalid async page faults involving private memory Paolo Bonzini

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=Zh0jLB5Ym8eUPLp2@chao-email \
    --to=chao.gao@intel.com \
    --cc=binbin.wu@linux.intel.com \
    --cc=isaku.yamahata@intel.com \
    --cc=kvm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=pbonzini@redhat.com \
    --cc=seanjc@google.com \
    --cc=xiaoyao.li@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.