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Each Cortex-R5F processor contains exclusive two 64 KB memory > banks on the ATCM and BTCM ports, for a total of 128 KB of memory. > In lockstep mode, both 128KB memory is accessible to the cluster. > > As per ZynqMP Ultrascale+ Technical Reference Manual UG1085, following > is address space of TCM memory. The bindings in this patch series > introduces properties to accommodate following address space with > address translation between Linux and Cortex-R5 views. > > | | | | > | --- | --- | --- | > | *Mode* | *R5 View* | *Linux view* | Notes | > | *Split Mode* | *start addr*| *start addr* | | > | R5_0 ATCM (64 KB) | 0x0000_0000 | 0xFFE0_0000 | | > | R5_0 BTCM (64 KB) | 0x0002_0000 | 0xFFE2_0000 | | > | R5_1 ATCM (64 KB) | 0x0000_0000 | 0xFFE9_0000 | alias of 0xFFE1_0000 | > | R5_1 BTCM (64 KB) | 0x0002_0000 | 0xFFEB_0000 | alias of 0xFFE3_0000 | > | ___ | ___ | ___ | | > | *Lockstep Mode* | | | | > | R5_0 ATCM (128 KB) | 0x0000_0000 | 0xFFE0_0000 | | > | R5_0 BTCM (128 KB) | 0x0002_0000 | 0xFFE2_0000 | | > > References: > UG1085 TCM address space: > https://docs.xilinx.com/r/en-US/ug1085-zynq-ultrascale-trm/Tightly-Coupled-Memory-Address-Map > I have applied patches 1, 2 and 4 of this set. Patch 3 should to through Michal's tree. Thanks, Mathieu > --- > > prerequisite-patch-link: https://lore.kernel.org/all/d4556268-8274-4089-949f-3b97d67793c7@gmail.com/ > Base Branch: 6.9.rc2 > > Changes in v15: > - Use hardcode TCM addresses as fallback method if "reg" unavailable > - Use new bindings for r5fss subsystem > > Changes in v14: > - Add xlnx,tcm-mode property and use it for TCM configuration > - Add Versal and Versal-NET platform support > - Maintain backward compatibility for ZynqMP platform and use hardcode > TCM addresses > > Changes in v13: > - Have power-domains property for lockstep case instead of > keeping it flexible. > - Add "items:" list in power-domains property > > > Radhey Shyam Pandey (1): > dt-bindings: remoteproc: add Tightly Coupled Memory (TCM) bindings > > Tanmay Shah (3): > remoteproc: zynqmp: fix lockstep mode memory region > dts: zynqmp: add properties for TCM in remoteproc > remoteproc: zynqmp: parse TCM from device tree > > .../remoteproc/xlnx,zynqmp-r5fss.yaml | 279 ++++++++++++++++-- > .../boot/dts/xilinx/zynqmp-zcu102-rev1.0.dts | 8 + > arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 67 ++++- > drivers/remoteproc/xlnx_r5_remoteproc.c | 273 +++++++++-------- > 4 files changed, 459 insertions(+), 168 deletions(-) > > > base-commit: 4d5aabb6843939fad36912be8bf109adf9af0848 > -- > 2.25.1 > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C3D99C4345F for ; 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Tue, 16 Apr 2024 09:58:59 -0700 (PDT) Received: from p14s ([2604:3d09:148c:c800:6e4e:6aac:cff6:726e]) by smtp.gmail.com with ESMTPSA id d20-20020a63d654000000b005dc3fc53f19sm9190074pgj.7.2024.04.16.09.58.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Apr 2024 09:58:57 -0700 (PDT) Date: Tue, 16 Apr 2024 10:58:54 -0600 From: Mathieu Poirier To: Tanmay Shah Cc: andersson@kernel.org, robh@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, michal.simek@amd.com, ben.levinsky@amd.com, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v15 0/4] add zynqmp TCM bindings Message-ID: References: <20240412183708.4036007-1-tanmay.shah@amd.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20240412183708.4036007-1-tanmay.shah@amd.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240416_095901_767668_8C7C1238 X-CRM114-Status: GOOD ( 19.35 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Apr 12, 2024 at 11:37:04AM -0700, Tanmay Shah wrote: > Tightly-Coupled Memories(TCMs) are low-latency memory that provides > predictable instruction execution and predictable data load/store > timing. Each Cortex-R5F processor contains exclusive two 64 KB memory > banks on the ATCM and BTCM ports, for a total of 128 KB of memory. > In lockstep mode, both 128KB memory is accessible to the cluster. > > As per ZynqMP Ultrascale+ Technical Reference Manual UG1085, following > is address space of TCM memory. The bindings in this patch series > introduces properties to accommodate following address space with > address translation between Linux and Cortex-R5 views. > > | | | | > | --- | --- | --- | > | *Mode* | *R5 View* | *Linux view* | Notes | > | *Split Mode* | *start addr*| *start addr* | | > | R5_0 ATCM (64 KB) | 0x0000_0000 | 0xFFE0_0000 | | > | R5_0 BTCM (64 KB) | 0x0002_0000 | 0xFFE2_0000 | | > | R5_1 ATCM (64 KB) | 0x0000_0000 | 0xFFE9_0000 | alias of 0xFFE1_0000 | > | R5_1 BTCM (64 KB) | 0x0002_0000 | 0xFFEB_0000 | alias of 0xFFE3_0000 | > | ___ | ___ | ___ | | > | *Lockstep Mode* | | | | > | R5_0 ATCM (128 KB) | 0x0000_0000 | 0xFFE0_0000 | | > | R5_0 BTCM (128 KB) | 0x0002_0000 | 0xFFE2_0000 | | > > References: > UG1085 TCM address space: > https://docs.xilinx.com/r/en-US/ug1085-zynq-ultrascale-trm/Tightly-Coupled-Memory-Address-Map > I have applied patches 1, 2 and 4 of this set. Patch 3 should to through Michal's tree. Thanks, Mathieu > --- > > prerequisite-patch-link: https://lore.kernel.org/all/d4556268-8274-4089-949f-3b97d67793c7@gmail.com/ > Base Branch: 6.9.rc2 > > Changes in v15: > - Use hardcode TCM addresses as fallback method if "reg" unavailable > - Use new bindings for r5fss subsystem > > Changes in v14: > - Add xlnx,tcm-mode property and use it for TCM configuration > - Add Versal and Versal-NET platform support > - Maintain backward compatibility for ZynqMP platform and use hardcode > TCM addresses > > Changes in v13: > - Have power-domains property for lockstep case instead of > keeping it flexible. > - Add "items:" list in power-domains property > > > Radhey Shyam Pandey (1): > dt-bindings: remoteproc: add Tightly Coupled Memory (TCM) bindings > > Tanmay Shah (3): > remoteproc: zynqmp: fix lockstep mode memory region > dts: zynqmp: add properties for TCM in remoteproc > remoteproc: zynqmp: parse TCM from device tree > > .../remoteproc/xlnx,zynqmp-r5fss.yaml | 279 ++++++++++++++++-- > .../boot/dts/xilinx/zynqmp-zcu102-rev1.0.dts | 8 + > arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 67 ++++- > drivers/remoteproc/xlnx_r5_remoteproc.c | 273 +++++++++-------- > 4 files changed, 459 insertions(+), 168 deletions(-) > > > base-commit: 4d5aabb6843939fad36912be8bf109adf9af0848 > -- > 2.25.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel