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diff for duplicates of <ZixSFLZYZaf8BKHP@debug.ba.rivosinc.com>

diff --git a/a/1.txt b/N1/1.txt
index 5e0afcf..4aed8b2 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,9 +1,9 @@
-On Thu, Apr 18, 2024 at 04:26:45PM +0200, Cl?ment L?ger wrote:
+On Thu, Apr 18, 2024 at 04:26:45PM +0200, Clément Léger wrote:
 >Add support in KVM SBI FWFT extension to allow VS-mode to request double
 >trap enabling. Double traps can then be generated by VS-mode, allowing
 >M-mode to redirect them to S-mode.
 >
->Signed-off-by: Cl?ment L?ger <cleger@rivosinc.com>
+>Signed-off-by: Clément Léger <cleger@rivosinc.com>
 >---
 > arch/riscv/include/asm/csr.h               |  1 +
 > arch/riscv/include/asm/kvm_vcpu_sbi_fwft.h |  2 +-
@@ -130,3 +130,8 @@ henvcfg. And if required it'll perform henvcfgh too (as `kvm_arch_vcpu_load` alr
 >2.43.0
 >
 >
+
+_______________________________________________
+linux-riscv mailing list
+linux-riscv@lists.infradead.org
+http://lists.infradead.org/mailman/listinfo/linux-riscv
diff --git a/a/content_digest b/N1/content_digest
index 927378d..527eaa4 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,17 +1,31 @@
  "ref\020240418142701.1493091-1-cleger@rivosinc.com\0"
  "ref\020240418142701.1493091-7-cleger@rivosinc.com\0"
  "From\0Deepak Gupta <debug@rivosinc.com>\0"
- "Subject\0[RFC PATCH 6/7] riscv: kvm: add SBI FWFT support for SBI_FWFT_DOUBLE_TRAP_ENABLE\0"
+ "Subject\0Re: [RFC PATCH 6/7] riscv: kvm: add SBI FWFT support for SBI_FWFT_DOUBLE_TRAP_ENABLE\0"
  "Date\0Fri, 26 Apr 2024 18:17:08 -0700\0"
- "To\0kvm-riscv@lists.infradead.org\0"
+ "To\0Cl\303\251ment L\303\251ger <cleger@rivosinc.com>\0"
+ "Cc\0Conor Dooley <conor@kernel.org>"
+  Rob Herring <robh+dt@kernel.org>
+  Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
+  Paul Walmsley <paul.walmsley@sifive.com>
+  Palmer Dabbelt <palmer@dabbelt.com>
+  Albert Ou <aou@eecs.berkeley.edu>
+  Anup Patel <anup@brainfault.org>
+  Atish Patra <atishp@atishpatra.org>
+  linux-riscv@lists.infradead.org
+  devicetree@vger.kernel.org
+  linux-kernel@vger.kernel.org
+  kvm@vger.kernel.org
+  kvm-riscv@lists.infradead.org
+ " Ved Shanbhogue <ved@rivosinc.com>\0"
  "\00:1\0"
  "b\0"
- "On Thu, Apr 18, 2024 at 04:26:45PM +0200, Cl?ment L?ger wrote:\n"
+ "On Thu, Apr 18, 2024 at 04:26:45PM +0200, Cl\303\251ment L\303\251ger wrote:\n"
  ">Add support in KVM SBI FWFT extension to allow VS-mode to request double\n"
  ">trap enabling. Double traps can then be generated by VS-mode, allowing\n"
  ">M-mode to redirect them to S-mode.\n"
  ">\n"
- ">Signed-off-by: Cl?ment L?ger <cleger@rivosinc.com>\n"
+ ">Signed-off-by: Cl\303\251ment L\303\251ger <cleger@rivosinc.com>\n"
  ">---\n"
  "> arch/riscv/include/asm/csr.h               |  1 +\n"
  "> arch/riscv/include/asm/kvm_vcpu_sbi_fwft.h |  2 +-\n"
@@ -137,6 +151,11 @@
  ">-- \n"
  ">2.43.0\n"
  ">\n"
- >
+ ">\n"
+ "\n"
+ "_______________________________________________\n"
+ "linux-riscv mailing list\n"
+ "linux-riscv@lists.infradead.org\n"
+ http://lists.infradead.org/mailman/listinfo/linux-riscv
 
-39eb4b11fc34377789e1eaa22f9b57584f42d1b6c2e98d7383b8b41749f54cd6
+f85b1b2b161b360b574181582370526bbeeeccbc21f3a26e932f97e634b20268

diff --git a/a/1.txt b/N2/1.txt
index 5e0afcf..8c5b22f 100644
--- a/a/1.txt
+++ b/N2/1.txt
@@ -1,9 +1,9 @@
-On Thu, Apr 18, 2024 at 04:26:45PM +0200, Cl?ment L?ger wrote:
+On Thu, Apr 18, 2024 at 04:26:45PM +0200, Clément Léger wrote:
 >Add support in KVM SBI FWFT extension to allow VS-mode to request double
 >trap enabling. Double traps can then be generated by VS-mode, allowing
 >M-mode to redirect them to S-mode.
 >
->Signed-off-by: Cl?ment L?ger <cleger@rivosinc.com>
+>Signed-off-by: Clément Léger <cleger@rivosinc.com>
 >---
 > arch/riscv/include/asm/csr.h               |  1 +
 > arch/riscv/include/asm/kvm_vcpu_sbi_fwft.h |  2 +-
diff --git a/a/content_digest b/N2/content_digest
index 927378d..8f5c42f 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -1,17 +1,31 @@
  "ref\020240418142701.1493091-1-cleger@rivosinc.com\0"
  "ref\020240418142701.1493091-7-cleger@rivosinc.com\0"
  "From\0Deepak Gupta <debug@rivosinc.com>\0"
- "Subject\0[RFC PATCH 6/7] riscv: kvm: add SBI FWFT support for SBI_FWFT_DOUBLE_TRAP_ENABLE\0"
+ "Subject\0Re: [RFC PATCH 6/7] riscv: kvm: add SBI FWFT support for SBI_FWFT_DOUBLE_TRAP_ENABLE\0"
  "Date\0Fri, 26 Apr 2024 18:17:08 -0700\0"
- "To\0kvm-riscv@lists.infradead.org\0"
+ "To\0Cl\303\251ment L\303\251ger <cleger@rivosinc.com>\0"
+ "Cc\0Conor Dooley <conor@kernel.org>"
+  Rob Herring <robh+dt@kernel.org>
+  Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
+  Paul Walmsley <paul.walmsley@sifive.com>
+  Palmer Dabbelt <palmer@dabbelt.com>
+  Albert Ou <aou@eecs.berkeley.edu>
+  Anup Patel <anup@brainfault.org>
+  Atish Patra <atishp@atishpatra.org>
+  linux-riscv@lists.infradead.org
+  devicetree@vger.kernel.org
+  linux-kernel@vger.kernel.org
+  kvm@vger.kernel.org
+  kvm-riscv@lists.infradead.org
+ " Ved Shanbhogue <ved@rivosinc.com>\0"
  "\00:1\0"
  "b\0"
- "On Thu, Apr 18, 2024 at 04:26:45PM +0200, Cl?ment L?ger wrote:\n"
+ "On Thu, Apr 18, 2024 at 04:26:45PM +0200, Cl\303\251ment L\303\251ger wrote:\n"
  ">Add support in KVM SBI FWFT extension to allow VS-mode to request double\n"
  ">trap enabling. Double traps can then be generated by VS-mode, allowing\n"
  ">M-mode to redirect them to S-mode.\n"
  ">\n"
- ">Signed-off-by: Cl?ment L?ger <cleger@rivosinc.com>\n"
+ ">Signed-off-by: Cl\303\251ment L\303\251ger <cleger@rivosinc.com>\n"
  ">---\n"
  "> arch/riscv/include/asm/csr.h               |  1 +\n"
  "> arch/riscv/include/asm/kvm_vcpu_sbi_fwft.h |  2 +-\n"
@@ -139,4 +153,4 @@
  ">\n"
  >
 
-39eb4b11fc34377789e1eaa22f9b57584f42d1b6c2e98d7383b8b41749f54cd6
+7b6b9403355eb63c036cba1aecf474589bf1ff40cd7a4c76fe5908d210675b16

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