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diff for duplicates of <ZixV3lCe3jYQN3Qx@debug.ba.rivosinc.com>

diff --git a/a/1.txt b/N1/1.txt
index f7210fc..c89bcb0 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,11 +1,11 @@
-On Thu, Apr 18, 2024 at 04:26:46PM +0200, Cl?ment L?ger wrote:
+On Thu, Apr 18, 2024 at 04:26:46PM +0200, Clément Léger wrote:
 >When a double trap exception is generated from VS-mode, it should be
 >delivered to M-mode which might redirect it to S-mode. Currently, the
 >kvm double trap exception handling simply prints an error and returns
 >-EOPNOTSUPP to stop VM execution. In future, this might use KVM SBI SSE
 >extension implementation to actually send an SSE event to the guest VM.
 >
->Signed-off-by: Cl?ment L?ger <cleger@rivosinc.com>
+>Signed-off-by: Clément Léger <cleger@rivosinc.com>
 >---
 > arch/riscv/include/asm/kvm_host.h |  7 ++++---
 > arch/riscv/include/uapi/asm/kvm.h |  1 +
@@ -332,3 +332,8 @@ for this this guest, right?
 >2.43.0
 >
 >
+
+_______________________________________________
+linux-riscv mailing list
+linux-riscv@lists.infradead.org
+http://lists.infradead.org/mailman/listinfo/linux-riscv
diff --git a/a/content_digest b/N1/content_digest
index 72b4e63..d7c4e44 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,19 +1,33 @@
  "ref\020240418142701.1493091-1-cleger@rivosinc.com\0"
  "ref\020240418142701.1493091-8-cleger@rivosinc.com\0"
  "From\0Deepak Gupta <debug@rivosinc.com>\0"
- "Subject\0[RFC PATCH 7/7] RISC-V: KVM: add support for double trap exception\0"
+ "Subject\0Re: [RFC PATCH 7/7] RISC-V: KVM: add support for double trap exception\0"
  "Date\0Fri, 26 Apr 2024 18:33:18 -0700\0"
- "To\0kvm-riscv@lists.infradead.org\0"
+ "To\0Cl\303\251ment L\303\251ger <cleger@rivosinc.com>\0"
+ "Cc\0Conor Dooley <conor@kernel.org>"
+  Rob Herring <robh+dt@kernel.org>
+  Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
+  Paul Walmsley <paul.walmsley@sifive.com>
+  Palmer Dabbelt <palmer@dabbelt.com>
+  Albert Ou <aou@eecs.berkeley.edu>
+  Anup Patel <anup@brainfault.org>
+  Atish Patra <atishp@atishpatra.org>
+  linux-riscv@lists.infradead.org
+  devicetree@vger.kernel.org
+  linux-kernel@vger.kernel.org
+  kvm@vger.kernel.org
+  kvm-riscv@lists.infradead.org
+ " Ved Shanbhogue <ved@rivosinc.com>\0"
  "\00:1\0"
  "b\0"
- "On Thu, Apr 18, 2024 at 04:26:46PM +0200, Cl?ment L?ger wrote:\n"
+ "On Thu, Apr 18, 2024 at 04:26:46PM +0200, Cl\303\251ment L\303\251ger wrote:\n"
  ">When a double trap exception is generated from VS-mode, it should be\n"
  ">delivered to M-mode which might redirect it to S-mode. Currently, the\n"
  ">kvm double trap exception handling simply prints an error and returns\n"
  ">-EOPNOTSUPP to stop VM execution. In future, this might use KVM SBI SSE\n"
  ">extension implementation to actually send an SSE event to the guest VM.\n"
  ">\n"
- ">Signed-off-by: Cl?ment L?ger <cleger@rivosinc.com>\n"
+ ">Signed-off-by: Cl\303\251ment L\303\251ger <cleger@rivosinc.com>\n"
  ">---\n"
  "> arch/riscv/include/asm/kvm_host.h |  7 ++++---\n"
  "> arch/riscv/include/uapi/asm/kvm.h |  1 +\n"
@@ -339,6 +353,11 @@
  ">-- \n"
  ">2.43.0\n"
  ">\n"
- >
+ ">\n"
+ "\n"
+ "_______________________________________________\n"
+ "linux-riscv mailing list\n"
+ "linux-riscv@lists.infradead.org\n"
+ http://lists.infradead.org/mailman/listinfo/linux-riscv
 
-1176f5b3bddf7b097d09cad887319260b6b47f051e212a045583b55e527c66bf
+52a204cd37a7ade1aeee9c02d40f5896c0909a218efbfee1183cdca85b04b244

diff --git a/a/1.txt b/N2/1.txt
index f7210fc..ddb59ab 100644
--- a/a/1.txt
+++ b/N2/1.txt
@@ -1,11 +1,11 @@
-On Thu, Apr 18, 2024 at 04:26:46PM +0200, Cl?ment L?ger wrote:
+On Thu, Apr 18, 2024 at 04:26:46PM +0200, Clément Léger wrote:
 >When a double trap exception is generated from VS-mode, it should be
 >delivered to M-mode which might redirect it to S-mode. Currently, the
 >kvm double trap exception handling simply prints an error and returns
 >-EOPNOTSUPP to stop VM execution. In future, this might use KVM SBI SSE
 >extension implementation to actually send an SSE event to the guest VM.
 >
->Signed-off-by: Cl?ment L?ger <cleger@rivosinc.com>
+>Signed-off-by: Clément Léger <cleger@rivosinc.com>
 >---
 > arch/riscv/include/asm/kvm_host.h |  7 ++++---
 > arch/riscv/include/uapi/asm/kvm.h |  1 +
diff --git a/a/content_digest b/N2/content_digest
index 72b4e63..1ccf2b1 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -1,19 +1,33 @@
  "ref\020240418142701.1493091-1-cleger@rivosinc.com\0"
  "ref\020240418142701.1493091-8-cleger@rivosinc.com\0"
  "From\0Deepak Gupta <debug@rivosinc.com>\0"
- "Subject\0[RFC PATCH 7/7] RISC-V: KVM: add support for double trap exception\0"
+ "Subject\0Re: [RFC PATCH 7/7] RISC-V: KVM: add support for double trap exception\0"
  "Date\0Fri, 26 Apr 2024 18:33:18 -0700\0"
- "To\0kvm-riscv@lists.infradead.org\0"
+ "To\0Cl\303\251ment L\303\251ger <cleger@rivosinc.com>\0"
+ "Cc\0Conor Dooley <conor@kernel.org>"
+  Rob Herring <robh+dt@kernel.org>
+  Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
+  Paul Walmsley <paul.walmsley@sifive.com>
+  Palmer Dabbelt <palmer@dabbelt.com>
+  Albert Ou <aou@eecs.berkeley.edu>
+  Anup Patel <anup@brainfault.org>
+  Atish Patra <atishp@atishpatra.org>
+  linux-riscv@lists.infradead.org
+  devicetree@vger.kernel.org
+  linux-kernel@vger.kernel.org
+  kvm@vger.kernel.org
+  kvm-riscv@lists.infradead.org
+ " Ved Shanbhogue <ved@rivosinc.com>\0"
  "\00:1\0"
  "b\0"
- "On Thu, Apr 18, 2024 at 04:26:46PM +0200, Cl?ment L?ger wrote:\n"
+ "On Thu, Apr 18, 2024 at 04:26:46PM +0200, Cl\303\251ment L\303\251ger wrote:\n"
  ">When a double trap exception is generated from VS-mode, it should be\n"
  ">delivered to M-mode which might redirect it to S-mode. Currently, the\n"
  ">kvm double trap exception handling simply prints an error and returns\n"
  ">-EOPNOTSUPP to stop VM execution. In future, this might use KVM SBI SSE\n"
  ">extension implementation to actually send an SSE event to the guest VM.\n"
  ">\n"
- ">Signed-off-by: Cl?ment L?ger <cleger@rivosinc.com>\n"
+ ">Signed-off-by: Cl\303\251ment L\303\251ger <cleger@rivosinc.com>\n"
  ">---\n"
  "> arch/riscv/include/asm/kvm_host.h |  7 ++++---\n"
  "> arch/riscv/include/uapi/asm/kvm.h |  1 +\n"
@@ -341,4 +355,4 @@
  ">\n"
  >
 
-1176f5b3bddf7b097d09cad887319260b6b47f051e212a045583b55e527c66bf
+4a2cb34d61876911177f7d317994c13b8b9a55b82e088434e1e79da775b1d93f

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