From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 19D3813B5B4; Thu, 9 May 2024 12:56:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715259405; cv=none; b=PpHvLrEdXTlsE+gOmfxqQgC6c0O6wa/TAeIIl3ga6dWZq6QywTR42eRkEV0r+PUehRlLDlnbDDUN/eNnHnxsU9fGA44fQgtRRQUZnSeVjHLdSpQcyjaffwQbcL7C/s/6OTr/gQAQ9dsFRr6Mb+x1/og8WSkA+XPZqwUtVisPGMo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715259405; c=relaxed/simple; bh=wpigIbeceMTaY2F9pP4aAlMrmJa5Qg4mScZk+XYaoK8=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=BJZBxvHSG7VY6kCz2Ua6jL/cTqEfJhZibYC5v16OFAHV4AteWH9AIfi3f6QZtPe3/vDzzTyVyRdY0Z4x8DLcGFjXUx/pUCXlC5iRexnTiepOoBs9yy70apvcd3DztPpxFaH+ANey7aZVPUfFrwKxXrXNdFjbQWZ0DOIaZFKbtV4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5DE78C116B1; Thu, 9 May 2024 12:56:38 +0000 (UTC) Date: Thu, 9 May 2024 13:56:36 +0100 From: Catalin Marinas To: Neal Gompa Cc: Ard Biesheuvel , Alex =?iso-8859-1?Q?Benn=E9e?= , Will Deacon , Hector Martin , Marc Zyngier , Mark Rutland , Zayd Qumsieh , Justin Lu , Ryan Houdek , Mark Brown , Mateusz Guzik , Anshuman Khandual , Oliver Upton , Miguel Luis , Joey Gouly , Christoph Paasch , Kees Cook , Sami Tolvanen , Baoquan He , Joel Granados , Dawei Li , Andrew Morton , Florent Revest , David Hildenbrand , Stefan Roesch , Andy Chiu , Josh Triplett , Oleg Nesterov , Helge Deller , Zev Weiss , Ondrej Mosnacek , Miguel Ojeda , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Asahi Linux Subject: Re: [PATCH 0/4] arm64: Support the TSO memory model Message-ID: References: <20240411-tso-v1-0-754f11abfbff@marcan.st> <20240411132853.GA26481@willie-the-truck> <87seythqct.fsf@draig.linaro.org> Precedence: bulk X-Mailing-List: asahi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: On Thu, May 09, 2024 at 06:31:04AM -0600, Neal Gompa wrote: > On Thu, May 9, 2024 at 5:13 AM Catalin Marinas wrote: > > I see the impdef hardware TSO options as temporary until CPU > > implementations catch up to architected FEAT_LRCPC*. Given the problems > > already stated in this thread, I think such hacks should be carried > > downstream and (hopefully) will eventually vanish. Maybe those TSO knobs > > currently make an emulation faster than FEAT_LRCPC* but that's feedback > > to go to the microarchitects on the implementation (or architects on > > what other instructions should be covered). > > They cannot ever "vanish" because we are supporting every Mx platform > back to the first one. The M1 series will never have FEAT_LRCPC. Well, you missed "eventually". It depends on the timeline you have in mind but, say, 15 years from now there may not be many M1s around to be worth maintaining these patches out-of-tree (and they don't make sense in-tree either because of the lack of standardisation). > I do not think it is unreasonable to support this method when we know > what the CPU platform is and FEAT_LRCPC does not exist. If you want a portable emulator, you better start supporting FEAT_LRCPC* (I think FEX does this), ideally detected at run-time with a fallback to RCsc. Whether, additionally, you want to support the non-portable Apple TSO with out-of-tree patches, it's up to you. -- Catalin From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CDDDBC10F1A for ; Thu, 9 May 2024 12:57:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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Thu, 9 May 2024 12:56:38 +0000 (UTC) Date: Thu, 9 May 2024 13:56:36 +0100 From: Catalin Marinas To: Neal Gompa Cc: Ard Biesheuvel , Alex =?iso-8859-1?Q?Benn=E9e?= , Will Deacon , Hector Martin , Marc Zyngier , Mark Rutland , Zayd Qumsieh , Justin Lu , Ryan Houdek , Mark Brown , Mateusz Guzik , Anshuman Khandual , Oliver Upton , Miguel Luis , Joey Gouly , Christoph Paasch , Kees Cook , Sami Tolvanen , Baoquan He , Joel Granados , Dawei Li , Andrew Morton , Florent Revest , David Hildenbrand , Stefan Roesch , Andy Chiu , Josh Triplett , Oleg Nesterov , Helge Deller , Zev Weiss , Ondrej Mosnacek , Miguel Ojeda , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Asahi Linux Subject: Re: [PATCH 0/4] arm64: Support the TSO memory model Message-ID: References: <20240411-tso-v1-0-754f11abfbff@marcan.st> <20240411132853.GA26481@willie-the-truck> <87seythqct.fsf@draig.linaro.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240509_055648_992401_9B72CA5B X-CRM114-Status: GOOD ( 15.71 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org T24gVGh1LCBNYXkgMDksIDIwMjQgYXQgMDY6MzE6MDRBTSAtMDYwMCwgTmVhbCBHb21wYSB3cm90 ZToKPiBPbiBUaHUsIE1heSA5LCAyMDI0IGF0IDU6MTPigK9BTSBDYXRhbGluIE1hcmluYXMgPGNh dGFsaW4ubWFyaW5hc0Bhcm0uY29tPiB3cm90ZToKPiA+IEkgc2VlIHRoZSBpbXBkZWYgaGFyZHdh cmUgVFNPIG9wdGlvbnMgYXMgdGVtcG9yYXJ5IHVudGlsIENQVQo+ID4gaW1wbGVtZW50YXRpb25z IGNhdGNoIHVwIHRvIGFyY2hpdGVjdGVkIEZFQVRfTFJDUEMqLiBHaXZlbiB0aGUgcHJvYmxlbXMK PiA+IGFscmVhZHkgc3RhdGVkIGluIHRoaXMgdGhyZWFkLCBJIHRoaW5rIHN1Y2ggaGFja3Mgc2hv dWxkIGJlIGNhcnJpZWQKPiA+IGRvd25zdHJlYW0gYW5kIChob3BlZnVsbHkpIHdpbGwgZXZlbnR1 YWxseSB2YW5pc2guIE1heWJlIHRob3NlIFRTTyBrbm9icwo+ID4gY3VycmVudGx5IG1ha2UgYW4g ZW11bGF0aW9uIGZhc3RlciB0aGFuIEZFQVRfTFJDUEMqIGJ1dCB0aGF0J3MgZmVlZGJhY2sKPiA+ IHRvIGdvIHRvIHRoZSBtaWNyb2FyY2hpdGVjdHMgb24gdGhlIGltcGxlbWVudGF0aW9uIChvciBh cmNoaXRlY3RzIG9uCj4gPiB3aGF0IG90aGVyIGluc3RydWN0aW9ucyBzaG91bGQgYmUgY292ZXJl ZCkuCj4gCj4gVGhleSBjYW5ub3QgZXZlciAidmFuaXNoIiBiZWNhdXNlIHdlIGFyZSBzdXBwb3J0 aW5nIGV2ZXJ5IE14IHBsYXRmb3JtCj4gYmFjayB0byB0aGUgZmlyc3Qgb25lLiBUaGUgTTEgc2Vy aWVzIHdpbGwgbmV2ZXIgaGF2ZSBGRUFUX0xSQ1BDLgoKV2VsbCwgeW91IG1pc3NlZCAiZXZlbnR1 YWxseSIuIEl0IGRlcGVuZHMgb24gdGhlIHRpbWVsaW5lIHlvdSBoYXZlIGluCm1pbmQgYnV0LCBz YXksIDE1IHllYXJzIGZyb20gbm93IHRoZXJlIG1heSBub3QgYmUgbWFueSBNMXMgYXJvdW5kIHRv IGJlCndvcnRoIG1haW50YWluaW5nIHRoZXNlIHBhdGNoZXMgb3V0LW9mLXRyZWUgKGFuZCB0aGV5 IGRvbid0IG1ha2Ugc2Vuc2UKaW4tdHJlZSBlaXRoZXIgYmVjYXVzZSBvZiB0aGUgbGFjayBvZiBz dGFuZGFyZGlzYXRpb24pLgoKPiBJIGRvIG5vdCB0aGluayBpdCBpcyB1bnJlYXNvbmFibGUgdG8g c3VwcG9ydCB0aGlzIG1ldGhvZCB3aGVuIHdlIGtub3cKPiB3aGF0IHRoZSBDUFUgcGxhdGZvcm0g aXMgYW5kIEZFQVRfTFJDUEMgZG9lcyBub3QgZXhpc3QuCgpJZiB5b3Ugd2FudCBhIHBvcnRhYmxl IGVtdWxhdG9yLCB5b3UgYmV0dGVyIHN0YXJ0IHN1cHBvcnRpbmcgRkVBVF9MUkNQQyoKKEkgdGhp bmsgRkVYIGRvZXMgdGhpcyksIGlkZWFsbHkgZGV0ZWN0ZWQgYXQgcnVuLXRpbWUgd2l0aCBhIGZh bGxiYWNrIHRvClJDc2MuIFdoZXRoZXIsIGFkZGl0aW9uYWxseSwgeW91IHdhbnQgdG8gc3VwcG9y dCB0aGUgbm9uLXBvcnRhYmxlIEFwcGxlClRTTyB3aXRoIG91dC1vZi10cmVlIHBhdGNoZXMsIGl0 J3MgdXAgdG8geW91LgoKLS0gCkNhdGFsaW4KCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fCmxpbnV4LWFybS1rZXJuZWwgbWFpbGluZyBsaXN0CmxpbnV4LWFy bS1rZXJuZWxAbGlzdHMuaW5mcmFkZWFkLm9yZwpodHRwOi8vbGlzdHMuaW5mcmFkZWFkLm9yZy9t YWlsbWFuL2xpc3RpbmZvL2xpbnV4LWFybS1rZXJuZWwK