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Thu, 23 May 2024 00:30:55 -0700 (PDT) Date: Thu, 23 May 2024 09:30:54 +0200 From: Roger Pau =?utf-8?B?TW9ubsOp?= To: Stewart Hildebrand Cc: xen-devel@lists.xenproject.org, Oleksandr Andrushchenko , Andrew Cooper , George Dunlap , Jan Beulich , Julien Grall , Stefano Stabellini , Volodymyr Babchuk Subject: Re: [PATCH v16 3/5] vpci: add initial support for virtual PCI bus topology Message-ID: References: <20240522225927.77398-1-stewart.hildebrand@amd.com> <20240522225927.77398-4-stewart.hildebrand@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20240522225927.77398-4-stewart.hildebrand@amd.com> On Wed, May 22, 2024 at 06:59:22PM -0400, Stewart Hildebrand wrote: > From: Oleksandr Andrushchenko > > Assign SBDF to the PCI devices being passed through with bus 0. > The resulting topology is where PCIe devices reside on the bus 0 of the > root complex itself (embedded endpoints). > This implementation is limited to 32 devices which are allowed on > a single PCI bus. > > Please note, that at the moment only function 0 of a multifunction > device can be passed through. > > Signed-off-by: Oleksandr Andrushchenko > Signed-off-by: Volodymyr Babchuk > Signed-off-by: Stewart Hildebrand > Acked-by: Jan Beulich Acked-by: Roger Pau Monné Thanks, Roger.