From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Jani Nikula <jani.nikula@intel.com>
Cc: <intel-gfx@lists.freedesktop.org>,
Lucas De Marchi <lucas.demarchi@intel.com>
Subject: Re: [PATCH 2/2] drm/i915: stop redefining INTEL_VGA_DEVICE
Date: Thu, 16 May 2024 09:25:55 -0400 [thread overview]
Message-ID: <ZkYJY9ITCVV9tiZj@intel.com> (raw)
In-Reply-To: <20240515165651.1230465-2-jani.nikula@intel.com>
On Wed, May 15, 2024 at 07:56:51PM +0300, Jani Nikula wrote:
> Now that the PCI ID macros allow us to pass in the macro to use, stop
> redefining INTEL_VGA_DEVICE.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
> .../drm/i915/display/intel_display_device.c | 87 +++++++++---------
> drivers/gpu/drm/i915/intel_device_info.c | 91 +++++++++----------
> 2 files changed, 88 insertions(+), 90 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
> index 950e66cdba0a..cf093bc0cb28 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.c
> @@ -795,55 +795,54 @@ static bool has_no_display(struct pci_dev *pdev)
> return pci_match_id(ids, pdev);
> }
>
> -#undef INTEL_VGA_DEVICE
> -#define INTEL_VGA_DEVICE(id, info) { id, info }
> +#define INTEL_DISPLAY_DEVICE(_id, _info) { .devid = (_id), .info = (_info) }
>
> static const struct {
> u32 devid;
> const struct intel_display_device_info *info;
> } intel_display_ids[] = {
> - INTEL_I830_IDS(INTEL_VGA_DEVICE, &i830_display),
> - INTEL_I845G_IDS(INTEL_VGA_DEVICE, &i845_display),
> - INTEL_I85X_IDS(INTEL_VGA_DEVICE, &i85x_display),
> - INTEL_I865G_IDS(INTEL_VGA_DEVICE, &i865g_display),
> - INTEL_I915G_IDS(INTEL_VGA_DEVICE, &i915g_display),
> - INTEL_I915GM_IDS(INTEL_VGA_DEVICE, &i915gm_display),
> - INTEL_I945G_IDS(INTEL_VGA_DEVICE, &i945g_display),
> - INTEL_I945GM_IDS(INTEL_VGA_DEVICE, &i945gm_display),
> - INTEL_I965G_IDS(INTEL_VGA_DEVICE, &i965g_display),
> - INTEL_G33_IDS(INTEL_VGA_DEVICE, &g33_display),
> - INTEL_I965GM_IDS(INTEL_VGA_DEVICE, &i965gm_display),
> - INTEL_GM45_IDS(INTEL_VGA_DEVICE, &gm45_display),
> - INTEL_G45_IDS(INTEL_VGA_DEVICE, &g45_display),
> - INTEL_PNV_IDS(INTEL_VGA_DEVICE, &pnv_display),
> - INTEL_ILK_D_IDS(INTEL_VGA_DEVICE, &ilk_d_display),
> - INTEL_ILK_M_IDS(INTEL_VGA_DEVICE, &ilk_m_display),
> - INTEL_SNB_IDS(INTEL_VGA_DEVICE, &snb_display),
> - INTEL_IVB_IDS(INTEL_VGA_DEVICE, &ivb_display),
> - INTEL_HSW_IDS(INTEL_VGA_DEVICE, &hsw_display),
> - INTEL_VLV_IDS(INTEL_VGA_DEVICE, &vlv_display),
> - INTEL_BDW_IDS(INTEL_VGA_DEVICE, &bdw_display),
> - INTEL_CHV_IDS(INTEL_VGA_DEVICE, &chv_display),
> - INTEL_SKL_IDS(INTEL_VGA_DEVICE, &skl_display),
> - INTEL_BXT_IDS(INTEL_VGA_DEVICE, &bxt_display),
> - INTEL_GLK_IDS(INTEL_VGA_DEVICE, &glk_display),
> - INTEL_KBL_IDS(INTEL_VGA_DEVICE, &skl_display),
> - INTEL_CFL_IDS(INTEL_VGA_DEVICE, &skl_display),
> - INTEL_WHL_IDS(INTEL_VGA_DEVICE, &skl_display),
> - INTEL_CML_IDS(INTEL_VGA_DEVICE, &skl_display),
> - INTEL_ICL_IDS(INTEL_VGA_DEVICE, &icl_display),
> - INTEL_EHL_IDS(INTEL_VGA_DEVICE, &jsl_ehl_display),
> - INTEL_JSL_IDS(INTEL_VGA_DEVICE, &jsl_ehl_display),
> - INTEL_TGL_IDS(INTEL_VGA_DEVICE, &tgl_display),
> - INTEL_DG1_IDS(INTEL_VGA_DEVICE, &dg1_display),
> - INTEL_RKL_IDS(INTEL_VGA_DEVICE, &rkl_display),
> - INTEL_ADLS_IDS(INTEL_VGA_DEVICE, &adl_s_display),
> - INTEL_RPLS_IDS(INTEL_VGA_DEVICE, &adl_s_display),
> - INTEL_ADLP_IDS(INTEL_VGA_DEVICE, &xe_lpd_display),
> - INTEL_ADLN_IDS(INTEL_VGA_DEVICE, &xe_lpd_display),
> - INTEL_RPLU_IDS(INTEL_VGA_DEVICE, &xe_lpd_display),
> - INTEL_RPLP_IDS(INTEL_VGA_DEVICE, &xe_lpd_display),
> - INTEL_DG2_IDS(INTEL_VGA_DEVICE, &xe_hpd_display),
> + INTEL_I830_IDS(INTEL_DISPLAY_DEVICE, &i830_display),
> + INTEL_I845G_IDS(INTEL_DISPLAY_DEVICE, &i845_display),
> + INTEL_I85X_IDS(INTEL_DISPLAY_DEVICE, &i85x_display),
> + INTEL_I865G_IDS(INTEL_DISPLAY_DEVICE, &i865g_display),
> + INTEL_I915G_IDS(INTEL_DISPLAY_DEVICE, &i915g_display),
> + INTEL_I915GM_IDS(INTEL_DISPLAY_DEVICE, &i915gm_display),
> + INTEL_I945G_IDS(INTEL_DISPLAY_DEVICE, &i945g_display),
> + INTEL_I945GM_IDS(INTEL_DISPLAY_DEVICE, &i945gm_display),
> + INTEL_I965G_IDS(INTEL_DISPLAY_DEVICE, &i965g_display),
> + INTEL_G33_IDS(INTEL_DISPLAY_DEVICE, &g33_display),
> + INTEL_I965GM_IDS(INTEL_DISPLAY_DEVICE, &i965gm_display),
> + INTEL_GM45_IDS(INTEL_DISPLAY_DEVICE, &gm45_display),
> + INTEL_G45_IDS(INTEL_DISPLAY_DEVICE, &g45_display),
> + INTEL_PNV_IDS(INTEL_DISPLAY_DEVICE, &pnv_display),
> + INTEL_ILK_D_IDS(INTEL_DISPLAY_DEVICE, &ilk_d_display),
> + INTEL_ILK_M_IDS(INTEL_DISPLAY_DEVICE, &ilk_m_display),
> + INTEL_SNB_IDS(INTEL_DISPLAY_DEVICE, &snb_display),
> + INTEL_IVB_IDS(INTEL_DISPLAY_DEVICE, &ivb_display),
> + INTEL_HSW_IDS(INTEL_DISPLAY_DEVICE, &hsw_display),
> + INTEL_VLV_IDS(INTEL_DISPLAY_DEVICE, &vlv_display),
> + INTEL_BDW_IDS(INTEL_DISPLAY_DEVICE, &bdw_display),
> + INTEL_CHV_IDS(INTEL_DISPLAY_DEVICE, &chv_display),
> + INTEL_SKL_IDS(INTEL_DISPLAY_DEVICE, &skl_display),
> + INTEL_BXT_IDS(INTEL_DISPLAY_DEVICE, &bxt_display),
> + INTEL_GLK_IDS(INTEL_DISPLAY_DEVICE, &glk_display),
> + INTEL_KBL_IDS(INTEL_DISPLAY_DEVICE, &skl_display),
> + INTEL_CFL_IDS(INTEL_DISPLAY_DEVICE, &skl_display),
> + INTEL_WHL_IDS(INTEL_DISPLAY_DEVICE, &skl_display),
> + INTEL_CML_IDS(INTEL_DISPLAY_DEVICE, &skl_display),
> + INTEL_ICL_IDS(INTEL_DISPLAY_DEVICE, &icl_display),
> + INTEL_EHL_IDS(INTEL_DISPLAY_DEVICE, &jsl_ehl_display),
> + INTEL_JSL_IDS(INTEL_DISPLAY_DEVICE, &jsl_ehl_display),
> + INTEL_TGL_IDS(INTEL_DISPLAY_DEVICE, &tgl_display),
> + INTEL_DG1_IDS(INTEL_DISPLAY_DEVICE, &dg1_display),
> + INTEL_RKL_IDS(INTEL_DISPLAY_DEVICE, &rkl_display),
> + INTEL_ADLS_IDS(INTEL_DISPLAY_DEVICE, &adl_s_display),
> + INTEL_RPLS_IDS(INTEL_DISPLAY_DEVICE, &adl_s_display),
> + INTEL_ADLP_IDS(INTEL_DISPLAY_DEVICE, &xe_lpd_display),
> + INTEL_ADLN_IDS(INTEL_DISPLAY_DEVICE, &xe_lpd_display),
> + INTEL_RPLU_IDS(INTEL_DISPLAY_DEVICE, &xe_lpd_display),
> + INTEL_RPLP_IDS(INTEL_DISPLAY_DEVICE, &xe_lpd_display),
> + INTEL_DG2_IDS(INTEL_DISPLAY_DEVICE, &xe_hpd_display),
>
> /*
> * Do not add any GMD_ID-based platforms to this list. They will
> diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
> index 82bb34416fb1..862f4b705227 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.c
> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> @@ -127,81 +127,80 @@ void intel_device_info_print(const struct intel_device_info *info,
> drm_printf(p, "rawclk rate: %u kHz\n", runtime->rawclk_freq);
> }
>
> -#undef INTEL_VGA_DEVICE
> -#define INTEL_VGA_DEVICE(id, info) (id)
> +#define ID(id) (id)
>
> static const u16 subplatform_ult_ids[] = {
> - INTEL_HSW_ULT_GT1_IDS(INTEL_VGA_DEVICE, 0),
> - INTEL_HSW_ULT_GT2_IDS(INTEL_VGA_DEVICE, 0),
> - INTEL_HSW_ULT_GT3_IDS(INTEL_VGA_DEVICE, 0),
> - INTEL_BDW_ULT_GT1_IDS(INTEL_VGA_DEVICE, 0),
> - INTEL_BDW_ULT_GT2_IDS(INTEL_VGA_DEVICE, 0),
> - INTEL_BDW_ULT_GT3_IDS(INTEL_VGA_DEVICE, 0),
> - INTEL_BDW_ULT_RSVD_IDS(INTEL_VGA_DEVICE, 0),
> - INTEL_SKL_ULT_GT1_IDS(INTEL_VGA_DEVICE, 0),
> - INTEL_SKL_ULT_GT2_IDS(INTEL_VGA_DEVICE, 0),
> - INTEL_SKL_ULT_GT3_IDS(INTEL_VGA_DEVICE, 0),
> - INTEL_KBL_ULT_GT1_IDS(INTEL_VGA_DEVICE, 0),
> - INTEL_KBL_ULT_GT2_IDS(INTEL_VGA_DEVICE, 0),
> - INTEL_KBL_ULT_GT3_IDS(INTEL_VGA_DEVICE, 0),
> - INTEL_CFL_U_GT2_IDS(INTEL_VGA_DEVICE, 0),
> - INTEL_CFL_U_GT3_IDS(INTEL_VGA_DEVICE, 0),
> - INTEL_WHL_U_GT1_IDS(INTEL_VGA_DEVICE, 0),
> - INTEL_WHL_U_GT2_IDS(INTEL_VGA_DEVICE, 0),
> - INTEL_WHL_U_GT3_IDS(INTEL_VGA_DEVICE, 0),
> - INTEL_CML_U_GT1_IDS(INTEL_VGA_DEVICE, 0),
> - INTEL_CML_U_GT2_IDS(INTEL_VGA_DEVICE, 0),
> + INTEL_HSW_ULT_GT1_IDS(ID),
> + INTEL_HSW_ULT_GT2_IDS(ID),
> + INTEL_HSW_ULT_GT3_IDS(ID),
> + INTEL_BDW_ULT_GT1_IDS(ID),
> + INTEL_BDW_ULT_GT2_IDS(ID),
> + INTEL_BDW_ULT_GT3_IDS(ID),
> + INTEL_BDW_ULT_RSVD_IDS(ID),
> + INTEL_SKL_ULT_GT1_IDS(ID),
> + INTEL_SKL_ULT_GT2_IDS(ID),
> + INTEL_SKL_ULT_GT3_IDS(ID),
> + INTEL_KBL_ULT_GT1_IDS(ID),
> + INTEL_KBL_ULT_GT2_IDS(ID),
> + INTEL_KBL_ULT_GT3_IDS(ID),
> + INTEL_CFL_U_GT2_IDS(ID),
> + INTEL_CFL_U_GT3_IDS(ID),
> + INTEL_WHL_U_GT1_IDS(ID),
> + INTEL_WHL_U_GT2_IDS(ID),
> + INTEL_WHL_U_GT3_IDS(ID),
> + INTEL_CML_U_GT1_IDS(ID),
> + INTEL_CML_U_GT2_IDS(ID),
> };
>
> static const u16 subplatform_ulx_ids[] = {
> - INTEL_HSW_ULX_GT1_IDS(INTEL_VGA_DEVICE, 0),
> - INTEL_HSW_ULX_GT2_IDS(INTEL_VGA_DEVICE, 0),
> - INTEL_BDW_ULX_GT1_IDS(INTEL_VGA_DEVICE, 0),
> - INTEL_BDW_ULX_GT2_IDS(INTEL_VGA_DEVICE, 0),
> - INTEL_BDW_ULX_GT3_IDS(INTEL_VGA_DEVICE, 0),
> - INTEL_BDW_ULX_RSVD_IDS(INTEL_VGA_DEVICE, 0),
> - INTEL_SKL_ULX_GT1_IDS(INTEL_VGA_DEVICE, 0),
> - INTEL_SKL_ULX_GT2_IDS(INTEL_VGA_DEVICE, 0),
> - INTEL_KBL_ULX_GT1_IDS(INTEL_VGA_DEVICE, 0),
> - INTEL_KBL_ULX_GT2_IDS(INTEL_VGA_DEVICE, 0),
> - INTEL_AML_KBL_GT2_IDS(INTEL_VGA_DEVICE, 0),
> - INTEL_AML_CFL_GT2_IDS(INTEL_VGA_DEVICE, 0),
> + INTEL_HSW_ULX_GT1_IDS(ID),
> + INTEL_HSW_ULX_GT2_IDS(ID),
> + INTEL_BDW_ULX_GT1_IDS(ID),
> + INTEL_BDW_ULX_GT2_IDS(ID),
> + INTEL_BDW_ULX_GT3_IDS(ID),
> + INTEL_BDW_ULX_RSVD_IDS(ID),
> + INTEL_SKL_ULX_GT1_IDS(ID),
> + INTEL_SKL_ULX_GT2_IDS(ID),
> + INTEL_KBL_ULX_GT1_IDS(ID),
> + INTEL_KBL_ULX_GT2_IDS(ID),
> + INTEL_AML_KBL_GT2_IDS(ID),
> + INTEL_AML_CFL_GT2_IDS(ID),
> };
>
> static const u16 subplatform_portf_ids[] = {
> - INTEL_ICL_PORT_F_IDS(INTEL_VGA_DEVICE, 0),
> + INTEL_ICL_PORT_F_IDS(ID),
> };
>
> static const u16 subplatform_uy_ids[] = {
> - INTEL_TGL_GT2_IDS(INTEL_VGA_DEVICE, 0),
> + INTEL_TGL_GT2_IDS(ID),
> };
>
> static const u16 subplatform_n_ids[] = {
> - INTEL_ADLN_IDS(INTEL_VGA_DEVICE, 0),
> + INTEL_ADLN_IDS(ID),
> };
>
> static const u16 subplatform_rpl_ids[] = {
> - INTEL_RPLS_IDS(INTEL_VGA_DEVICE, 0),
> - INTEL_RPLU_IDS(INTEL_VGA_DEVICE, 0),
> - INTEL_RPLP_IDS(INTEL_VGA_DEVICE, 0),
> + INTEL_RPLS_IDS(ID),
> + INTEL_RPLU_IDS(ID),
> + INTEL_RPLP_IDS(ID),
> };
>
> static const u16 subplatform_rplu_ids[] = {
> - INTEL_RPLU_IDS(INTEL_VGA_DEVICE, 0),
> + INTEL_RPLU_IDS(ID),
> };
>
> static const u16 subplatform_g10_ids[] = {
> - INTEL_DG2_G10_IDS(INTEL_VGA_DEVICE, 0),
> - INTEL_ATS_M150_IDS(INTEL_VGA_DEVICE, 0),
> + INTEL_DG2_G10_IDS(ID),
> + INTEL_ATS_M150_IDS(ID),
> };
>
> static const u16 subplatform_g11_ids[] = {
> - INTEL_DG2_G11_IDS(INTEL_VGA_DEVICE, 0),
> - INTEL_ATS_M75_IDS(INTEL_VGA_DEVICE, 0),
> + INTEL_DG2_G11_IDS(ID),
> + INTEL_ATS_M75_IDS(ID),
> };
>
> static const u16 subplatform_g12_ids[] = {
> - INTEL_DG2_G12_IDS(INTEL_VGA_DEVICE, 0),
> + INTEL_DG2_G12_IDS(ID),
> };
>
> static bool find_devid(u16 id, const u16 *p, unsigned int num)
> --
> 2.39.2
>
next prev parent reply other threads:[~2024-05-16 13:26 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-15 16:56 [PATCH 1/2] drm/i915/pciids: switch to xe driver style PCI ID macros Jani Nikula
2024-05-15 16:56 ` [PATCH 2/2] drm/i915: stop redefining INTEL_VGA_DEVICE Jani Nikula
2024-05-16 13:25 ` Rodrigo Vivi
2024-05-16 13:25 ` Rodrigo Vivi [this message]
2024-05-15 18:09 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/pciids: switch to xe driver style PCI ID macros Patchwork
2024-05-15 18:10 ` ✗ Fi.CI.CHECKPATCH: warning " Patchwork
2024-05-15 18:10 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-05-16 5:15 ` ✗ Fi.CI.IGT: failure " Patchwork
2024-05-16 13:25 ` [PATCH 1/2] " Rodrigo Vivi
2024-05-20 12:27 ` Jani Nikula
2024-05-22 9:43 ` Jani Nikula
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