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> assert_transcoder_disabled(dev_priv, crtc_state->cpu_transcoder); > > - intel_de_write(dev_priv, PFIT_PGM_RATIOS, > + intel_de_write(dev_priv, PFIT_PGM_RATIOS(dev_priv), > crtc_state->gmch_pfit.pgm_ratios); > intel_de_write(dev_priv, PFIT_CONTROL(dev_priv), > crtc_state->gmch_pfit.control); > @@ -2990,7 +2990,7 @@ static void i9xx_get_pfit_config(struct intel_crtc_state *crtc_state) > > crtc_state->gmch_pfit.control = tmp; > crtc_state->gmch_pfit.pgm_ratios = > - intel_de_read(dev_priv, PFIT_PGM_RATIOS); > + intel_de_read(dev_priv, PFIT_PGM_RATIOS(dev_priv)); > } > > static enum intel_output_format > diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c > index e41881f08d1f..117120ce5a1d 100644 > --- a/drivers/gpu/drm/i915/display/intel_overlay.c > +++ b/drivers/gpu/drm/i915/display/intel_overlay.c > @@ -943,7 +943,7 @@ static void update_pfit_vscale_ratio(struct intel_overlay *overlay) > * line with the intel documentation for the i965 > */ > if (DISPLAY_VER(dev_priv) >= 4) { > - u32 tmp = intel_de_read(dev_priv, PFIT_PGM_RATIOS); > + u32 tmp = intel_de_read(dev_priv, PFIT_PGM_RATIOS(dev_priv)); > > /* on i965 use the PGM reg to read out the autoscaler values */ > ratio = REG_FIELD_GET(PFIT_VERT_SCALE_MASK_965, tmp); > @@ -953,7 +953,8 @@ static void update_pfit_vscale_ratio(struct intel_overlay *overlay) > if (intel_de_read(dev_priv, PFIT_CONTROL(dev_priv)) & PFIT_VERT_AUTO_SCALE) > tmp = intel_de_read(dev_priv, PFIT_AUTO_RATIOS); > else > - tmp = intel_de_read(dev_priv, PFIT_PGM_RATIOS); > + tmp = intel_de_read(dev_priv, > + PFIT_PGM_RATIOS(dev_priv)); > > ratio = REG_FIELD_GET(PFIT_VERT_SCALE_MASK, tmp); > } > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index b0dbe6113bbc..094e693c40bf 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -1609,7 +1609,7 @@ > #define PFIT_HORIZ_AUTO_SCALE REG_BIT(5) /* pre-965 */ > #define PFIT_PANEL_8TO6_DITHER_ENABLE REG_BIT(3) /* pre-965 */ > > -#define PFIT_PGM_RATIOS _MMIO(DISPLAY_MMIO_BASE(dev_priv) + 0x61234) > +#define PFIT_PGM_RATIOS(dev_priv) _MMIO(DISPLAY_MMIO_BASE(dev_priv) + 0x61234) > #define PFIT_VERT_SCALE_MASK REG_GENMASK(31, 20) /* pre-965 */ > #define PFIT_VERT_SCALE(x) REG_FIELD_PREP(PFIT_VERT_SCALE_MASK, (x)) > #define PFIT_HORIZ_SCALE_MASK REG_GENMASK(15, 4) /* pre-965 */ > -- > 2.39.2 >