From: Lorenzo Bianconi <lorenzo@kernel.org>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: linux-pci@vger.kernel.org, ryder.lee@mediatek.com,
lpieralisi@kernel.org, kw@linux.com, robh@kernel.org,
bhelgaas@google.com, linux-mediatek@lists.infradead.org,
lorenzo.bianconi83@gmail.com,
linux-arm-kernel@lists.infradead.org,
krzysztof.kozlowski+dt@linaro.org, devicetree@vger.kernel.org,
nbd@nbd.name, dd@embedd.com, upstream@airoha.com,
angelogioacchino.delregno@collabora.com
Subject: Re: [PATCH 3/4] PCI: mediatek-gen3: rely on reset_bulk APIs for phy reset lines
Date: Fri, 21 Jun 2024 23:43:17 +0200 [thread overview]
Message-ID: <ZnXz9Rqj-OBecnUh@lore-desk> (raw)
In-Reply-To: <20240621175138.GA1395691@bhelgaas>
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> On Fri, Jun 21, 2024 at 04:48:49PM +0200, Lorenzo Bianconi wrote:
> > Use reset_bulk APIs to manage phy reset lines. This is a preliminary
> > patch in order to add Airoha EN7581 pcie support.
>
> If you have occasion to revise this:
>
> s/rely/Rely/ in subject
> s/phy/PHY/ in subject and commit log
> s/pcie/PCIe/ in commit log
ack, I will fix them in v2
>
> > @@ -912,7 +927,13 @@ static int mtk_pcie_setup(struct mtk_gen3_pcie *pcie)
> > * The controller may have been left out of reset by the bootloader
> > * so make sure that we get a clean start by asserting resets here.
> > */
> > - reset_control_assert(pcie->phy_reset);
> > + reset_control_bulk_deassert(pcie->soc->phy_resets.num_rsts,
> > + pcie->phy_resets);
> > + usleep_range(5000, 10000);
> > + reset_control_bulk_assert(pcie->soc->phy_resets.num_rsts,
> > + pcie->phy_resets);
> > + msleep(100);
>
> Where did these usleep and msleep numbers come from? They should use
> a #define that we can connect back to a spec.
I think we can get rid of the first usleep_range() since we need to
deassert the line just to avoid unbalance in deassert_count counter since the
reset line is shared (the line is actually already de-assert). I will add a
comment to clarify it.
>
> These delays should also be mentioned in the commit log because it
> appears unrelated to the conversion to the reset_bulk API. Actually,
> it would be even better if they were in a separate patch, since it
> looks like a logically separate change.
Regarding the msleep(100), it is not documented in the vendor sdk, I think it
necessary to complete the reset before initialize the pcie-phy. Since it is
required just for EN7581, I guess we can move it in mtk_pcie_en7581_power_up()
(in patch 4/4) before the phy_init(). What do you think?
Regards,
Lorenzo
>
> > reset_control_assert(pcie->mac_reset);
> > usleep_range(10, 20);
>
> Unrelated to this patch, but it would be nice to have an explanation
> of this existing delay, too.
>
> Bjorn
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next prev parent reply other threads:[~2024-06-21 21:43 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-21 14:48 [PATCH 0/4] Add Airoha EN7581 PCIE support Lorenzo Bianconi
2024-06-21 14:48 ` [PATCH 1/4] dt-bindings: PCI: mediatek-gen3: add support for Airoha EN7581 Lorenzo Bianconi
2024-06-22 12:04 ` Conor Dooley
2024-06-23 9:31 ` Lorenzo Bianconi
2024-06-21 14:48 ` [PATCH 2/4] PCI: mediatek-gen3: Add mtk_pcie_soc data structure Lorenzo Bianconi
2024-06-24 7:57 ` AngeloGioacchino Del Regno
2024-06-27 6:50 ` Lorenzo Bianconi
2024-06-21 14:48 ` [PATCH 3/4] PCI: mediatek-gen3: rely on reset_bulk APIs for phy reset lines Lorenzo Bianconi
2024-06-21 17:51 ` Bjorn Helgaas
2024-06-21 21:43 ` Lorenzo Bianconi [this message]
2024-06-24 8:01 ` AngeloGioacchino Del Regno
2024-06-27 7:03 ` Lorenzo Bianconi
2024-06-21 14:48 ` [PATCH 4/4] PCI: mediatek-gen3: Add Airoha EN7581 support Lorenzo Bianconi
2024-06-21 18:02 ` Bjorn Helgaas
2024-06-21 22:03 ` Lorenzo Bianconi
2024-06-24 7:55 ` AngeloGioacchino Del Regno
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