From: Johan Hovold <johan@kernel.org>
To: Konrad Dybcio <konrad.dybcio@linaro.org>
Cc: Johan Hovold <johan+linaro@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Abel Vesa <abel.vesa@linaro.org>,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] arm64: dts: qcom: x1e80100: enable GICv3 ITS for PCIe
Date: Thu, 11 Jul 2024 12:04:04 +0200 [thread overview]
Message-ID: <Zo-uFGK7Ge_9-DJb@hovoldconsulting.com> (raw)
In-Reply-To: <bf41aa8b-6a49-4610-8a8e-c2dab8ef4334@linaro.org>
On Thu, Jul 11, 2024 at 12:00:50PM +0200, Konrad Dybcio wrote:
> On 11.07.2024 11:58 AM, Johan Hovold wrote:
> > What branch are you using? Abel reported seeing this with his branch
> > which has a few work-in-progress patches that try to enable 4-lane PCIe.
> >
> > There are no errors with my wip branch based on rc7, and I have the same
> > drive as Abel.
>
> linux-next/master
Hmm. Ok. We may need to disable L0s as I did for sc8280xp as well, but
that was not the cause for Abel's errors.
> > Also note that the errors happen also without this patch applied, they
> > are just being reported now.
>
> Ouch.. wonder how much that drives the perf down
Could you post the output of lspci -vv for the NVMe controller?
Johan
next prev parent reply other threads:[~2024-07-11 10:04 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-11 9:02 [PATCH] arm64: dts: qcom: x1e80100: enable GICv3 ITS for PCIe Johan Hovold
2024-07-11 9:54 ` Konrad Dybcio
2024-07-11 9:58 ` Johan Hovold
2024-07-11 10:00 ` Konrad Dybcio
2024-07-11 10:04 ` Johan Hovold [this message]
2024-07-11 15:01 ` Johan Hovold
2024-07-11 16:19 ` Manivannan Sadhasivam
2024-07-11 16:41 ` Manivannan Sadhasivam
2024-07-11 16:59 ` Johan Hovold
2024-07-12 8:20 ` Johan Hovold
2024-07-12 13:31 ` Manivannan Sadhasivam
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