From: Mingwei Zhang <mizhang@google.com>
To: Colton Lewis <coltonlewis@google.com>
Cc: kvm@vger.kernel.org, Jinrong Liang <ljr.kernel@gmail.com>,
Jim Mattson <jmattson@google.com>,
Aaron Lewis <aaronlewis@google.com>,
Sean Christopherson <seanjc@google.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Shuah Khan <shuah@kernel.org>,
linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/6] KVM: x86: selftests: Define AMD PMU CPUID leaves
Date: Mon, 26 Aug 2024 22:27:20 +0000 [thread overview]
Message-ID: <Zs0BSCb_Khyxg08x@google.com> (raw)
In-Reply-To: <20240813164244.751597-3-coltonlewis@google.com>
On Tue, Aug 13, 2024, Colton Lewis wrote:
> This defined the CPUID calls to determine what extensions and
> properties are available. AMD reference manual names listed below.
>
> * PerfCtrExtCore (six core counters instead of four)
> * PerfCtrExtNB (four counters for northbridge events)
> * PerfCtrExtL2I (four counters for L2 cache events)
> * PerfMonV2 (support for registers to control multiple
> counters with a single register write)
> * LbrAndPmcFreeze (support for freezing last branch recorded stack on
> performance counter overflow)
> * NumPerfCtrCore (number of core counters)
> * NumPerfCtrNB (number of northbridge counters)
>
> Signed-off-by: Colton Lewis <coltonlewis@google.com>
> ---
> tools/testing/selftests/kvm/include/x86_64/processor.h | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/tools/testing/selftests/kvm/include/x86_64/processor.h b/tools/testing/selftests/kvm/include/x86_64/processor.h
> index a0c1440017bb..9d87b5f8974f 100644
> --- a/tools/testing/selftests/kvm/include/x86_64/processor.h
> +++ b/tools/testing/selftests/kvm/include/x86_64/processor.h
> @@ -183,6 +183,9 @@ struct kvm_x86_cpu_feature {
> #define X86_FEATURE_GBPAGES KVM_X86_CPU_FEATURE(0x80000001, 0, EDX, 26)
> #define X86_FEATURE_RDTSCP KVM_X86_CPU_FEATURE(0x80000001, 0, EDX, 27)
> #define X86_FEATURE_LM KVM_X86_CPU_FEATURE(0x80000001, 0, EDX, 29)
> +#define X86_FEATURE_PERF_CTR_EXT_CORE KVM_X86_CPU_FEATURE(0x80000001, 0, ECX, 23)
> +#define X86_FEATURE_PERF_CTR_EXT_NB KVM_X86_CPU_FEATURE(0x80000001, 0, ECX, 24)
> +#define X86_FEATURE_PERF_CTR_EXT_L2I KVM_X86_CPU_FEATURE(0x80000001, 0, ECX, 28)
You won't be testing Northbridge counters and L2I counters, so these two
could be optional to the patch.
> #define X86_FEATURE_INVTSC KVM_X86_CPU_FEATURE(0x80000007, 0, EDX, 8)
> #define X86_FEATURE_RDPRU KVM_X86_CPU_FEATURE(0x80000008, 0, EBX, 4)
> #define X86_FEATURE_AMD_IBPB KVM_X86_CPU_FEATURE(0x80000008, 0, EBX, 12)
> @@ -195,6 +198,8 @@ struct kvm_x86_cpu_feature {
> #define X86_FEATURE_VGIF KVM_X86_CPU_FEATURE(0x8000000A, 0, EDX, 16)
> #define X86_FEATURE_SEV KVM_X86_CPU_FEATURE(0x8000001F, 0, EAX, 1)
> #define X86_FEATURE_SEV_ES KVM_X86_CPU_FEATURE(0x8000001F, 0, EAX, 3)
> +#define X86_FEATURE_PERF_MON_V2 KVM_X86_CPU_FEATURE(0x80000022, 0, EAX, 0)
Let's use X86_FEATURE_PERFMON_V2 instead.
> +#define X86_FEATURE_PERF_LBR_PMC_FREEZE KVM_X86_CPU_FEATURE(0x80000022, 0, EAX, 2)
You don't use this feature, do you? If not, this can be optional for the
patch.
>
> /*
> * KVM defined paravirt features.
> @@ -281,6 +286,8 @@ struct kvm_x86_cpu_property {
> #define X86_PROPERTY_GUEST_MAX_PHY_ADDR KVM_X86_CPU_PROPERTY(0x80000008, 0, EAX, 16, 23)
> #define X86_PROPERTY_SEV_C_BIT KVM_X86_CPU_PROPERTY(0x8000001F, 0, EBX, 0, 5)
> #define X86_PROPERTY_PHYS_ADDR_REDUCTION KVM_X86_CPU_PROPERTY(0x8000001F, 0, EBX, 6, 11)
> +#define X86_PROPERTY_NUM_PERF_CTR_CORE KVM_X86_CPU_PROPERTY(0x80000022, 0, EBX, 0, 3)
> +#define X86_PROPERTY_NUM_PERF_CTR_NB KVM_X86_CPU_PROPERTY(0x80000022, 0, EBX, 10, 15)
>
ditto.
> #define X86_PROPERTY_MAX_CENTAUR_LEAF KVM_X86_CPU_PROPERTY(0xC0000000, 0, EAX, 0, 31)
>
> --
> 2.46.0.76.ge559c4bf1a-goog
>
next prev parent reply other threads:[~2024-08-26 22:27 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-13 16:42 [PATCH 0/6] Extend pmu_counters_test to AMD CPUs Colton Lewis
2024-08-13 16:42 ` [PATCH 1/6] KVM: x86: selftests: Fix typos in macro variable use Colton Lewis
2024-08-21 18:21 ` Mingwei Zhang
2024-08-28 21:24 ` Colton Lewis
2024-08-13 16:42 ` [PATCH 2/6] KVM: x86: selftests: Define AMD PMU CPUID leaves Colton Lewis
2024-08-26 22:27 ` Mingwei Zhang [this message]
2024-08-28 22:24 ` Colton Lewis
2024-08-29 20:25 ` Sean Christopherson
2024-08-13 16:42 ` [PATCH 3/6] KVM: x86: selftests: Set up AMD VM in pmu_counters_test Colton Lewis
2024-08-26 22:43 ` Mingwei Zhang
2024-08-28 22:39 ` Colton Lewis
2024-08-28 23:18 ` Mingwei Zhang
2024-08-29 20:45 ` Sean Christopherson
2024-09-02 18:37 ` Colton Lewis
2024-08-13 16:42 ` [PATCH 4/6] KVM: x86: selftests: Test read/write core counters Colton Lewis
2024-08-13 16:42 ` [PATCH 5/6] KVM: x86: selftests: Test core events Colton Lewis
2024-08-13 16:42 ` [PATCH 6/6] KVM: x86: selftests: Test PerfMonV2 Colton Lewis
2024-08-13 17:36 ` [PATCH 0/6] Extend pmu_counters_test to AMD CPUs Sean Christopherson
2024-08-13 20:09 ` Colton Lewis
2024-08-14 1:03 ` Sean Christopherson
2024-08-14 16:58 ` Colton Lewis
-- strict thread matches above, loose matches on Subject: below --
2024-08-02 18:22 [PATCH 0/7] " Colton Lewis
2024-08-02 18:22 ` [PATCH 2/6] KVM: x86: selftests: Define AMD PMU CPUID leaves Colton Lewis
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